mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-22 02:49:44 +09:00
49191d259f
This adds a clock driver to support the GEMGXL management IP block found in FU540 SoCs to control GEM TX clock operation mode for 10/100/1000 Mbps. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
8 lines
211 B
Makefile
8 lines
211 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
|
|
|
|
obj-$(CONFIG_CLK_ANALOGBITS_WRPLL_CLN28HPC) += wrpll-cln28hpc.o
|
|
|
|
obj-$(CONFIG_CLK_SIFIVE_FU540_PRCI) += fu540-prci.o
|
|
|
|
obj-$(CONFIG_CLK_SIFIVE_GEMGXL_MGMT) += gemgxl-mgmt.o
|