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https://github.com/brain-hackers/u-boot-brain
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![Przemyslaw Marczak](/assets/img/avatar_default.png)
The SD card detection depends on checking one pin state. But the pin was configured after card was detected, which is wrong. This commit fixes this, by moving call to pinmux before use the pin. Tested-on: Odroid U3 and Odroid X2. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
218 lines
5.1 KiB
C
218 lines
5.1 KiB
C
/*
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* (C) Copyright 2012 SAMSUNG Electronics
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* Jaehoon Chung <jh80.chung@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <malloc.h>
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#include <sdhci.h>
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#include <fdtdec.h>
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#include <libfdt.h>
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#include <asm/gpio.h>
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#include <asm/arch/mmc.h>
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#include <asm/arch/clk.h>
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#include <errno.h>
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#include <asm/arch/pinmux.h>
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static char *S5P_NAME = "SAMSUNG SDHCI";
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static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
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{
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unsigned long val, ctrl;
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/*
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* SELCLKPADDS[17:16]
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* 00 = 2mA
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* 01 = 4mA
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* 10 = 7mA
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* 11 = 9mA
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*/
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sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4);
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val = sdhci_readl(host, SDHCI_CONTROL2);
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val &= SDHCI_CTRL2_SELBASECLK_MASK(3);
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val |= SDHCI_CTRL2_ENSTAASYNCCLR |
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SDHCI_CTRL2_ENCMDCNFMSK |
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SDHCI_CTRL2_ENFBCLKRX |
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SDHCI_CTRL2_ENCLKOUTHOLD;
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sdhci_writel(host, val, SDHCI_CONTROL2);
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/*
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* FCSEL3[31] FCSEL2[23] FCSEL1[15] FCSEL0[7]
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* FCSel[1:0] : Rx Feedback Clock Delay Control
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* Inverter delay means10ns delay if SDCLK 50MHz setting
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* 01 = Delay1 (basic delay)
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* 11 = Delay2 (basic delay + 2ns)
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* 00 = Delay3 (inverter delay)
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* 10 = Delay4 (inverter delay + 2ns)
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*/
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val = SDHCI_CTRL3_FCSEL0 | SDHCI_CTRL3_FCSEL1;
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sdhci_writel(host, val, SDHCI_CONTROL3);
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/*
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* SELBASECLK[5:4]
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* 00/01 = HCLK
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* 10 = EPLL
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* 11 = XTI or XEXTCLK
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*/
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ctrl = sdhci_readl(host, SDHCI_CONTROL2);
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ctrl &= ~SDHCI_CTRL2_SELBASECLK_MASK(0x3);
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ctrl |= SDHCI_CTRL2_SELBASECLK_MASK(0x2);
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sdhci_writel(host, ctrl, SDHCI_CONTROL2);
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}
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static int s5p_sdhci_core_init(struct sdhci_host *host)
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{
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host->name = S5P_NAME;
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host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
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SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
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SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
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host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
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host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
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host->set_control_reg = &s5p_sdhci_set_control_reg;
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host->set_clock = set_mmc_clk;
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if (host->bus_width == 8)
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host->host_caps |= MMC_MODE_8BIT;
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return add_sdhci(host, 52000000, 400000);
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}
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int s5p_sdhci_init(u32 regbase, int index, int bus_width)
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{
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struct sdhci_host *host = calloc(1, sizeof(struct sdhci_host));
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if (!host) {
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printf("sdhci__host allocation fail!\n");
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return 1;
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}
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host->ioaddr = (void *)regbase;
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host->index = index;
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host->bus_width = bus_width;
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return s5p_sdhci_core_init(host);
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}
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
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static int do_sdhci_init(struct sdhci_host *host)
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{
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int dev_id, flag, ret;
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flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
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dev_id = host->index + PERIPH_ID_SDMMC0;
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ret = exynos_pinmux_config(dev_id, flag);
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if (ret) {
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printf("external SD not configured\n");
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return ret;
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}
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if (dm_gpio_is_valid(&host->pwr_gpio)) {
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dm_gpio_set_value(&host->pwr_gpio, 1);
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ret = exynos_pinmux_config(dev_id, flag);
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if (ret) {
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debug("MMC not configured\n");
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return ret;
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}
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}
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if (dm_gpio_is_valid(&host->cd_gpio)) {
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ret = dm_gpio_get_value(&host->cd_gpio);
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if (ret) {
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debug("no SD card detected (%d)\n", ret);
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return -ENODEV;
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}
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}
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return s5p_sdhci_core_init(host);
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}
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static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host)
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{
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int bus_width, dev_id;
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unsigned int base;
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/* Get device id */
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dev_id = pinmux_decode_periph_id(blob, node);
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if (dev_id < PERIPH_ID_SDMMC0 && dev_id > PERIPH_ID_SDMMC3) {
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debug("MMC: Can't get device id\n");
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return -1;
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}
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host->index = dev_id - PERIPH_ID_SDMMC0;
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/* Get bus width */
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bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0);
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if (bus_width <= 0) {
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debug("MMC: Can't get bus-width\n");
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return -1;
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}
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host->bus_width = bus_width;
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/* Get the base address from the device node */
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base = fdtdec_get_addr(blob, node, "reg");
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if (!base) {
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debug("MMC: Can't get base address\n");
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return -1;
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}
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host->ioaddr = (void *)base;
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gpio_request_by_name_nodev(blob, node, "pwr-gpios", 0, &host->pwr_gpio,
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GPIOD_IS_OUT);
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gpio_request_by_name_nodev(blob, node, "cd-gpios", 0, &host->cd_gpio,
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GPIOD_IS_IN);
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return 0;
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}
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static int process_nodes(const void *blob, int node_list[], int count)
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{
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struct sdhci_host *host;
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int i, node, ret;
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int failed = 0;
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debug("%s: count = %d\n", __func__, count);
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/* build sdhci_host[] for each controller */
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for (i = 0; i < count; i++) {
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node = node_list[i];
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if (node <= 0)
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continue;
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host = &sdhci_host[i];
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ret = sdhci_get_config(blob, node, host);
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if (ret) {
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printf("%s: failed to decode dev %d (%d)\n", __func__, i, ret);
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failed++;
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continue;
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}
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ret = do_sdhci_init(host);
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if (ret && ret != -ENODEV) {
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printf("%s: failed to initialize dev %d (%d)\n", __func__, i, ret);
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failed++;
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}
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}
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/* we only consider it an error when all nodes fail */
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return (failed == count ? -1 : 0);
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}
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int exynos_mmc_init(const void *blob)
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{
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int count;
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int node_list[SDHCI_MAX_HOSTS];
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count = fdtdec_find_aliases_for_id(blob, "mmc",
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COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
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SDHCI_MAX_HOSTS);
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return process_nodes(blob, node_list, count);
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}
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#endif
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