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![Heiko Stübner](/assets/img/avatar_default.png)
Add the core architecture code for the rk3188. It doesn't support the SPL yet, as because of some unknown error it doesn't start yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com> Drop these defines from rk3188_common.h CONFIG_GENERIC_MMC, CONFIG_BOUNCE_BUFFER, CONFIG_DOS_PARTITION CONFIG_PARTITION_UUIDS, CONFIG_CMD_PART: Signed-off-by: Simon Glass <sjg@chromium.org>
56 lines
1.3 KiB
C
56 lines
1.3 KiB
C
/*
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* Copyright (C) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <syscon.h>
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#include <asm/arch/clock.h>
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static const struct udevice_id rk3188_syscon_ids[] = {
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{ .compatible = "rockchip,rk3188-noc", .data = ROCKCHIP_SYSCON_NOC },
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{ .compatible = "rockchip,rk3188-grf", .data = ROCKCHIP_SYSCON_GRF },
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{ .compatible = "rockchip,rk3188-pmu", .data = ROCKCHIP_SYSCON_PMU },
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{ }
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};
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U_BOOT_DRIVER(syscon_rk3188) = {
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.name = "rk3188_syscon",
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.id = UCLASS_SYSCON,
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.of_match = rk3188_syscon_ids,
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};
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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static int rk3188_syscon_bind_of_platdata(struct udevice *dev)
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{
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dev->driver_data = dev->driver->of_match->data;
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debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
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return 0;
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}
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U_BOOT_DRIVER(rockchip_rk3188_noc) = {
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.name = "rockchip_rk3188_noc",
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.id = UCLASS_SYSCON,
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.of_match = rk3188_syscon_ids,
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.bind = rk3188_syscon_bind_of_platdata,
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};
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U_BOOT_DRIVER(rockchip_rk3188_grf) = {
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.name = "rockchip_rk3188_grf",
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.id = UCLASS_SYSCON,
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.of_match = rk3188_syscon_ids + 1,
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.bind = rk3188_syscon_bind_of_platdata,
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};
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U_BOOT_DRIVER(rockchip_rk3188_pmu) = {
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.name = "rockchip_rk3188_pmu",
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.id = UCLASS_SYSCON,
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.of_match = rk3188_syscon_ids + 2,
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.bind = rk3188_syscon_bind_of_platdata,
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};
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#endif
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