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![Heiko Stübner](/assets/img/avatar_default.png)
Add the core architecture code for the rk3188. It doesn't support the SPL yet, as because of some unknown error it doesn't start yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com> Drop these defines from rk3188_common.h CONFIG_GENERIC_MMC, CONFIG_BOUNCE_BUFFER, CONFIG_DOS_PARTITION CONFIG_PARTITION_UUIDS, CONFIG_CMD_PART: Signed-off-by: Simon Glass <sjg@chromium.org>
34 lines
597 B
C
34 lines
597 B
C
/*
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* Copyright (C) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <syscon.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/cru_rk3188.h>
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int rockchip_get_clk(struct udevice **devp)
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{
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return uclass_get_device_by_driver(UCLASS_CLK,
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DM_GET_DRIVER(rockchip_rk3188_cru), devp);
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}
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void *rockchip_get_cru(void)
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{
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struct rk3188_clk_priv *priv;
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struct udevice *dev;
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int ret;
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ret = rockchip_get_clk(&dev);
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if (ret)
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return ERR_PTR(ret);
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priv = dev_get_priv(dev);
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return priv->cru;
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}
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