mirror of
https://github.com/brain-hackers/u-boot-brain
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06cc85a29a
At present CP15 init is disabled on tegra. Use the correct option so that this init is performed on boot. This enables the instruction cache, for example, which is critical to the machine running at full speed. Signed-off-by: Simon Glass <sjg@chromium.org>
132 lines
2.6 KiB
C
132 lines
2.6 KiB
C
/*
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* (C) Copyright 2010-2012
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* NVIDIA Corporation <www.nvidia.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __TEGRA_COMMON_POST_H
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#define __TEGRA_COMMON_POST_H
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/*
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* Size of malloc() pool
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*/
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#ifdef CONFIG_USB_FUNCTION_DFU
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#define CONFIG_SYS_MALLOC_LEN (SZ_4M + \
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CONFIG_SYS_DFU_DATA_BUF_SIZE + \
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CONFIG_SYS_DFU_MAX_FILE_SIZE)
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#else
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#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
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#endif
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#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
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#ifndef CONFIG_SPL_BUILD
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 0) \
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func(USB, usb, 0) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#else
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#define BOOTENV
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#endif
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#ifdef CONFIG_TEGRA_KEYBOARD
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#define STDIN_KBD_KBC ",tegra-kbc"
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#else
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#define STDIN_KBD_KBC ""
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#endif
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#ifdef CONFIG_USB_KEYBOARD
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#define STDIN_KBD_USB ",usbkbd"
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#define CONFIG_SYS_USB_EVENT_POLL
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#define CONFIG_PREBOOT "usb start"
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#else
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#define STDIN_KBD_USB ""
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#endif
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#ifdef CONFIG_LCD
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#define STDOUT_LCD ",lcd"
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#else
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#define STDOUT_LCD ""
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#endif
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#ifdef CONFIG_DM_VIDEO
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#define STDOUT_VIDEO ",vidconsole"
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#else
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#define STDOUT_VIDEO ""
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#endif
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#ifdef CONFIG_CROS_EC_KEYB
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#define STDOUT_CROS_EC ",cros-ec-keyb"
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#else
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#define STDOUT_CROS_EC ""
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#endif
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#define TEGRA_DEVICE_SETTINGS \
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"stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC "\0" \
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"stdout=serial" STDOUT_LCD STDOUT_VIDEO "\0" \
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"stderr=serial" STDOUT_LCD STDOUT_VIDEO "\0" \
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""
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#ifndef BOARD_EXTRA_ENV_SETTINGS
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#define BOARD_EXTRA_ENV_SETTINGS
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#endif
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#ifndef CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
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#define CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
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#endif
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#ifdef CONFIG_ARM64
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#define FDT_HIGH "ffffffffffffffff"
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#define INITRD_HIGH "ffffffffffffffff"
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#else
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#define FDT_HIGH "ffffffff"
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#define INITRD_HIGH "ffffffff"
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#endif
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#define CONFIG_EXTRA_ENV_SETTINGS \
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TEGRA_DEVICE_SETTINGS \
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MEM_LAYOUT_ENV_SETTINGS \
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"fdt_high=" FDT_HIGH "\0" \
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"initrd_high=" INITRD_HIGH "\0" \
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BOOTENV \
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BOARD_EXTRA_ENV_SETTINGS \
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CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS
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#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI)
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#define CONFIG_TEGRA_SPI
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#endif
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/* overrides for SPL build here */
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
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/* remove I2C support */
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#ifdef CONFIG_SYS_I2C_TEGRA
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#undef CONFIG_SYS_I2C_TEGRA
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#endif
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#ifdef CONFIG_CMD_I2C
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#endif
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/* remove partitions/filesystems */
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#ifdef CONFIG_FS_EXT4
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#undef CONFIG_FS_EXT4
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#endif
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/* remove USB */
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#ifdef CONFIG_USB_EHCI_TEGRA
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#undef CONFIG_USB_EHCI_TEGRA
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#endif
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#ifdef CONFIG_CMD_USB
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#endif
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#endif /* CONFIG_SPL_BUILD */
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#endif /* __TEGRA_COMMON_POST_H */
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