shengjiangwu caee45ecc3 arm: socfpga: Fix QSPI doesn't work on socdk board ... Updated pinmux group MIXED1IO[15-20] for QSPI. Updated QSPI clock. Signed-off-by: shengjiangwu <shengjiangwu@icloud.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>		2015-12-22 21:30:02 +01:00
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qts	arm: socfpga: Fix QSPI doesn't work on socdk board	2015-12-22 21:30:02 +01:00
MAINTAINERS	arm: socfpga: update MAINTAINERS' file for cyclone5_socdk and arria5_socdk	2015-09-23 03:55:28 +02:00
Makefile	arm: socfpga: Split Altera socfpga into AV and CV SoCDK	2015-08-23 11:56:19 +02:00
socfpga.c	arm: socfpga: Drop the board boilerplate	2015-12-20 03:36:51 +01:00