mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 02:36:39 +09:00
25ddd1fb0a
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
340 lines
10 KiB
C
340 lines
10 KiB
C
/*
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* Configuation settings for the Freescale MCF52277 EVB board.
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*
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* board/config.h - configuration options, board specific
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*/
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#ifndef _M52277EVB_H
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#define _M52277EVB_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_MCF5227x /* define processor family */
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#define CONFIG_M52277 /* define processor type */
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#define CONFIG_M52277EVB /* M52277EVB board */
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#define CONFIG_MCFUART
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#define CONFIG_SYS_UART_PORT (0)
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
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#undef CONFIG_WATCHDOG
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#define CONFIG_TIMESTAMP /* Print image info with timestamp */
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/* Command line configuration */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_JFFS2
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#define CONFIG_CMD_LOADB
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#define CONFIG_CMD_LOADS
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_MISC
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#undef CONFIG_CMD_NET
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#define CONFIG_CMD_REGINFO
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#undef CONFIG_CMD_USB
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#undef CONFIG_CMD_BMP
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_SF
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#define CONFIG_HOSTNAME M52277EVB
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#define CONFIG_SYS_UBOOT_END 0x3FFFF
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#define CONFIG_SYS_LOAD_ADDR2 0x40010007
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#ifdef CONFIG_SYS_STMICRO_BOOT
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/* ST Micro serial flash */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
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"loadaddr=0x40010000\0" \
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"uboot=u-boot.bin\0" \
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"load=loadb ${loadaddr} ${baudrate};" \
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"loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
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"upd=run load; run prog\0" \
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"prog=sf probe 0:2 10000 1;" \
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"sf erase 0 30000;" \
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"sf write ${loadaddr} 0 30000;" \
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"save\0" \
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""
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#endif
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#ifdef CONFIG_SYS_SPANSION_BOOT
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
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"loadaddr=0x40010000\0" \
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"uboot=u-boot.bin\0" \
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"load=loadb ${loadaddr} ${baudrate}\0" \
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"upd=run load; run prog\0" \
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"prog=prot off " MK_STR(CONFIG_SYS_FLASH_BASE) \
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" " MK_STR(CONFIG_SYS_UBOOT_END) ";" \
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"era " MK_STR(CONFIG_SYS_FLASH_BASE) " " \
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MK_STR(CONFIG_SYS_UBOOT_END) ";" \
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"cp.b ${loadaddr} " MK_STR(CONFIG_SYS_FLASH_BASE) \
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" ${filesize}; save\0" \
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"updsbf=run loadsbf; run progsbf\0" \
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"loadsbf=loadb ${loadaddr} ${baudrate};" \
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"loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
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"progsbf=sf probe 0:2 10000 1;" \
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"sf erase 0 30000;" \
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"sf write ${loadaddr} 0 30000;" \
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""
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#endif
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#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
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/* LCD */
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#ifdef CONFIG_CMD_BMP
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#define CONFIG_LCD
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_LCD_LOGO
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#define CONFIG_SHARP_LQ035Q7DH06
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#endif
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_STORAGE
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#define CONFIG_DOS_PARTITION
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#define CONFIG_MAC_PARTITION
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#define CONFIG_ISO_PARTITION
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#define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000
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#define CONFIG_SYS_USB_EHCI_CPU_INIT
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#endif
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/* Realtime clock */
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#define CONFIG_MCFRTC
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#undef RTC_DEBUG
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#define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ)
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/* Timer */
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#define CONFIG_MCFTMR
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#undef CONFIG_MCFPIT
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/* I2c */
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#define CONFIG_FSL_I2C
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_OFFSET 0x58000
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#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
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/* DSPI and Serial Flash */
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#define CONFIG_CF_SPI
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#define CONFIG_CF_DSPI
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#define CONFIG_HARD_SPI
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#define CONFIG_SYS_SBFHDR_SIZE 0x7
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#ifdef CONFIG_CMD_SPI
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# define CONFIG_SYS_DSPI_CS2
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# define CONFIG_SPI_FLASH
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# define CONFIG_SPI_FLASH_STMICRO
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# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
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DSPI_CTAR_PCSSCK_1CLK | \
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DSPI_CTAR_PASC(0) | \
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DSPI_CTAR_PDT(0) | \
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DSPI_CTAR_CSSCK(0) | \
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DSPI_CTAR_ASC(0) | \
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DSPI_CTAR_DT(1))
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#endif
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/* Input, PCI, Flexbus, and VCO */
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#define CONFIG_EXTRA_CLOCK
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#define CONFIG_SYS_INPUT_CLKSRC 16000000
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#define CONFIG_PRAM 2048 /* 2048 KB */
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#define CONFIG_SYS_PROMPT "-> "
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_MBAR 0xFC000000
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/*
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* Low Level Configuration Settings
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* (address mappings, register initial values, etc.)
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* You should know what you are doing if you make changes here.
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*/
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/*
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* Definitions for initial stack pointer and data area (in DPRAM)
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*/
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#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */
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#define CONFIG_SYS_INIT_RAM_CTRL 0x221
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#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32)
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#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32)
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#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
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/*
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
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*/
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */
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#define CONFIG_SYS_SDRAM_CFG1 0x43711630
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#define CONFIG_SYS_SDRAM_CFG2 0x56670000
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#define CONFIG_SYS_SDRAM_CTRL 0xE1092000
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#define CONFIG_SYS_SDRAM_EMOD 0x81810000
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#define CONFIG_SYS_SDRAM_MODE 0x00CD0000
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#define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
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#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
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#ifdef CONFIG_CF_SBF
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# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
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#else
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# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
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#endif
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#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
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#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
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/* Initial Memory map for Linux */
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#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
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#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
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/*
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* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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*/
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#ifdef CONFIG_CF_SBF
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# define CONFIG_ENV_IS_IN_SPI_FLASH
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# define CONFIG_ENV_SPI_CS 2
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#else
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# define CONFIG_ENV_IS_IN_FLASH 1
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#endif
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#define CONFIG_ENV_OVERWRITE 1
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#ifdef CONFIG_SYS_STMICRO_BOOT
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# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
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# define CONFIG_ENV_OFFSET 0x30000
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# define CONFIG_ENV_SIZE 0x1000
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# define CONFIG_ENV_SECT_SIZE 0x10000
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#endif
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#ifdef CONFIG_SYS_SPANSION_BOOT
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# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
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# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
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# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000)
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# define CONFIG_ENV_SIZE 0x1000
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# define CONFIG_ENV_SECT_SIZE 0x8000
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#endif
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#define CONFIG_SYS_FLASH_CFI
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#ifdef CONFIG_SYS_FLASH_CFI
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# define CONFIG_FLASH_CFI_DRIVER 1
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# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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# define CONFIG_FLASH_SPANSION_S29WS_N 1
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# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
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# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
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# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
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# define CONFIG_SYS_FLASH_CHECKSUM
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# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE }
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#endif
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/*
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* This is setting for JFFS2 support in u-boot.
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* NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
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*/
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#ifdef CONFIG_CMD_JFFS2
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# define CONFIG_JFFS2_DEV "nor0"
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# define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000)
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# define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000)
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#endif
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/*-----------------------------------------------------------------------
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* Cache Configuration
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*/
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#define CONFIG_SYS_CACHELINE_SIZE 16
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#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - 8)
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#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - 4)
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#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
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#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
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CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
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CF_ACR_EN | CF_ACR_SM_ALL)
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#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
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CF_CACR_DISD | CF_CACR_INVI | \
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CF_CACR_CEIB | CF_CACR_DCM | \
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CF_CACR_EUSP)
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/*-----------------------------------------------------------------------
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* Memory bank definitions
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*/
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/*
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* CS0 - NOR Flash
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* CS1 - Available
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* CS2 - Available
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* CS3 - Available
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* CS4 - Available
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* CS5 - Available
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*/
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#ifdef CONFIG_CF_SBF
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#define CONFIG_SYS_CS0_BASE 0x04000000
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#define CONFIG_SYS_CS0_MASK 0x00FF0001
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#define CONFIG_SYS_CS0_CTRL 0x00001FA0
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#else
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#define CONFIG_SYS_CS0_BASE 0x00000000
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#define CONFIG_SYS_CS0_MASK 0x00FF0001
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#define CONFIG_SYS_CS0_CTRL 0x00001FA0
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#endif
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#endif /* _M52277EVB_H */
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