u-boot-brain/board/freescale/p1_p2_rdb
Priyanka Jain cac29f25fd powerpc/85xx: Read board switch settings on p1_p2_rdb
PCA9557 is parallel I/O expansion device on I2C bus which stores various
board switch settings like NOR Flash-Bank selection, SD Data width.

On board:
switch SW5[6] is to select width for eSDHC
        ON  - 4-bit [Enable eSPI]
        OFF - 8-bit [Disable eSPI]

switch SW4[8] is to select NOR Flash Bank for Booting
        OFF - Primary Bank
        ON  - Secondary Bank

Read board switch settings on p1_p2_rdb and configure corresponding
eSDHC width.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-04 09:24:42 -05:00
..
ddr.c powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb 2011-04-04 09:24:42 -05:00
law.c powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe code 2011-01-14 01:32:20 -06:00
Makefile Switch from archive libraries to partial linking 2010-11-17 21:02:18 +01:00
p1_p2_rdb.c powerpc/85xx: Read board switch settings on p1_p2_rdb 2011-04-04 09:24:42 -05:00
pci.c powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe code 2011-01-14 01:32:20 -06:00
tlb.c powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb 2011-04-04 09:24:42 -05:00