mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-24 11:59:46 +09:00
caa4daa2ae
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
146 lines
3.4 KiB
C
146 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015, Google, Inc
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <log.h>
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#include <malloc.h>
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#include <mapmem.h>
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#include <sdhci.h>
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#include <acpi/acpigen.h>
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#include <acpi/acpi_device.h>
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#include <acpi/acpi_dp.h>
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#include <asm-generic/gpio.h>
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#include <dm/acpi.h>
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struct pci_mmc_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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struct pci_mmc_priv {
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struct sdhci_host host;
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void *base;
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struct gpio_desc cd_gpio;
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};
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static int pci_mmc_probe(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct pci_mmc_plat *plat = dev_get_platdata(dev);
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struct pci_mmc_priv *priv = dev_get_priv(dev);
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struct sdhci_host *host = &priv->host;
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int ret;
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host->ioaddr = (void *)dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0,
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PCI_REGION_MEM);
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host->name = dev->name;
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host->mmc = &plat->mmc;
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host->mmc->dev = dev;
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ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
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if (ret)
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return ret;
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host->mmc->priv = &priv->host;
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upriv->mmc = host->mmc;
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return sdhci_probe(dev);
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}
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static int pci_mmc_ofdata_to_platdata(struct udevice *dev)
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{
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struct pci_mmc_priv *priv = dev_get_priv(dev);
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gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
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return 0;
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}
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static int pci_mmc_bind(struct udevice *dev)
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{
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struct pci_mmc_plat *plat = dev_get_platdata(dev);
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return sdhci_bind(dev, &plat->mmc, &plat->cfg);
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}
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static int pci_mmc_acpi_fill_ssdt(const struct udevice *dev,
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struct acpi_ctx *ctx)
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{
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struct pci_mmc_priv *priv = dev_get_priv(dev);
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char path[ACPI_PATH_MAX];
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struct acpi_gpio gpio;
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struct acpi_dp *dp;
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int ret;
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if (!dev_of_valid(dev))
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return 0;
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ret = gpio_get_acpi(&priv->cd_gpio, &gpio);
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if (ret)
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return log_msg_ret("gpio", ret);
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gpio.type = ACPI_GPIO_TYPE_INTERRUPT;
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gpio.pull = ACPI_GPIO_PULL_NONE;
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gpio.irq.mode = ACPI_IRQ_EDGE_TRIGGERED;
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gpio.irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
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gpio.irq.shared = ACPI_IRQ_SHARED;
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gpio.irq.wake = ACPI_IRQ_WAKE;
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gpio.interrupt_debounce_timeout = 10000; /* 100ms */
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/* Use device path as the Scope for the SSDT */
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ret = acpi_device_path(dev, path, sizeof(path));
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if (ret)
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return log_msg_ret("path", ret);
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acpigen_write_scope(ctx, path);
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acpigen_write_name(ctx, "_CRS");
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/* Write GpioInt() as default (if set) or custom from devicetree */
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acpigen_write_resourcetemplate_header(ctx);
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acpi_device_write_gpio(ctx, &gpio);
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acpigen_write_resourcetemplate_footer(ctx);
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/* Bind the cd-gpio name to the GpioInt() resource */
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dp = acpi_dp_new_table("_DSD");
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if (!dp)
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return -ENOMEM;
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acpi_dp_add_gpio(dp, "cd-gpio", path, 0, 0, 1);
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ret = acpi_dp_write(ctx, dp);
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if (ret)
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return log_msg_ret("cd", ret);
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acpigen_pop_len(ctx);
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return 0;
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}
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struct acpi_ops pci_mmc_acpi_ops = {
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.fill_ssdt = pci_mmc_acpi_fill_ssdt,
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};
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static const struct udevice_id pci_mmc_match[] = {
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{ .compatible = "intel,apl-sd" },
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{ }
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};
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U_BOOT_DRIVER(pci_mmc) = {
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.name = "pci_mmc",
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.id = UCLASS_MMC,
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.of_match = pci_mmc_match,
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.bind = pci_mmc_bind,
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.ofdata_to_platdata = pci_mmc_ofdata_to_platdata,
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.probe = pci_mmc_probe,
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.ops = &sdhci_ops,
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.priv_auto = sizeof(struct pci_mmc_priv),
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.plat_auto = sizeof(struct pci_mmc_plat),
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ACPI_OPS_PTR(&pci_mmc_acpi_ops)
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};
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static struct pci_device_id mmc_supported[] = {
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{ PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDHCI << 8, 0xffff00) },
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{},
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};
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U_BOOT_PCI_DEVICE(pci_mmc, mmc_supported);
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