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![Angelo Dureghello](/assets/img/avatar_default.png)
This patch adds a basic group of devicetrees, one for each cpu family, including actually just uart and dspi devices, since these are the drivers supporting devicetree (support added in this patch-set). Acked-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Angelo Dureghello <angelo@sysam.it> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
41 lines
760 B
Plaintext
41 lines
760 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
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*/
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/ {
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compatible = "fsl,mcf54x5";
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aliases {
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/* TO DO, clarify on serial, this SoC seems to have SPC and
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* no UARTS.
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*/
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spi0 = &dspi0;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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mbar: mbar@80000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x80000000 0x10000>;
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reg = <0x80000000 0x10000>;
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dspi0: dspi@8a00 {
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compatible = "fsl,mcf-dspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x8a00 0x100>;
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spi-max-frequency = <50000000>;
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num-cs = <4>;
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spi-mode = <0>;
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status = "disabled";
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};
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};
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};
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};
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