mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 08:58:52 +09:00
![Tom Rini](/assets/img/avatar_default.png)
This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
304 lines
9.3 KiB
C
304 lines
9.3 KiB
C
/*
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* Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
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* (C) Copyright 2013 Siemens AG
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*
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* Based on:
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* U-Boot file: include/configs/at91sam9260ek.h
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*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* SoC must be defined first, before hardware.h is included.
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* In this case SoC is defined in boards.cfg.
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*/
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#include <asm/hardware.h>
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#include <linux/sizes.h>
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#if defined(CONFIG_SPL_BUILD)
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#define CONFIG_SYS_THUMB_BUILD
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_SYS_DCACHE_OFF
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#endif
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/*
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* Warning: changing CONFIG_SYS_TEXT_BASE requires
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* adapting the initial boot program.
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* Since the linker has to swallow that define, we must use a pure
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* hex number here!
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*/
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#define CONFIG_SYS_TEXT_BASE 0x21000000
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
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/* Misc CPU related */
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DISPLAY_CPUINFO
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/* general purpose I/O */
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#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
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#define CONFIG_AT91_GPIO
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#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#define CONFIG_BAUDRATE 115200
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_NAND
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/*
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* SDRAM: 1 bank, min 32, max 128 MB
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* Initialized before u-boot gets started.
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
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#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
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/*
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* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
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* leaving the correct space for initial global data structure above
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* that address while providing maximum stack area below.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR \
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(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
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#endif
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/* NOR flash - no real flash on this board */
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#define CONFIG_SYS_NO_FLASH 1
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/* Ethernet */
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#define CONFIG_MACB
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#define CONFIG_PHYLIB
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#define CONFIG_RMII
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#define CONFIG_AT91_WANTS_COMMON_PHY
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#define CONFIG_AT91SAM9_WATCHDOG
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#define CONFIG_AT91_HW_WDT_TIMEOUT 15
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#if !defined(CONFIG_SPL_BUILD)
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/* Enable the watchdog */
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#define CONFIG_HW_WATCHDOG
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#endif
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/* USB */
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#if defined(CONFIG_BOARD_TAURUS)
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_USB_STORAGE
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/* USB DFU support */
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_USB_GADGET_AT91
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/* DFU class support */
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#define CONFIG_USB_FUNCTION_DFU
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#define CONFIG_DFU_NAND
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
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#define DFU_MANIFEST_POLL_TIMEOUT 25000
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#endif
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/* SPI EEPROM */
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#define CONFIG_SPI
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#define CONFIG_ATMEL_SPI
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#define TAURUS_SPI_MASK (1 << 4)
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#define TAURUS_SPI_CS_PIN AT91_PIN_PA3
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#if defined(CONFIG_SPL_BUILD)
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/* SPL related */
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#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
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#define CONFIG_SPL_SPI_SUPPORT
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#define CONFIG_SPL_SPI_FLASH_SUPPORT
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#define CONFIG_SPL_SPI_LOAD
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_SPEED 1000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
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#endif
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/* load address */
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#define CONFIG_SYS_LOAD_ADDR 0x22000000
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/* bootstrap in spi flash , u-boot + env + linux in nandflash */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0x100000
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#define CONFIG_ENV_OFFSET_REDUND 0x180000
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#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
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#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
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#if defined(CONFIG_BOARD_TAURUS)
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#define CONFIG_BOOTARGS_TAURUS \
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"console=ttyS0,115200 earlyprintk " \
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"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
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"256k(env),256k(env_redundant),256k(spare)," \
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"512k(dtb),6M(kernel)ro,-(rootfs) " \
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"root=/dev/mtdblock7 rw rootfstype=jffs2"
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#endif
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#if defined(CONFIG_BOARD_AXM)
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#define CONFIG_BOOTARGS_AXM \
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"\0" \
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"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
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"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
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"addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
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"baudrate=115200\0" \
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"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
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"boot_retries=0\0" \
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"bootcmd=run flash_self\0" \
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"bootdelay=3\0" \
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"ethact=macb0\0" \
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"flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
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"bootm ${kernel_ram};reset\0" \
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"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
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"bootm ${kernel_ram};reset\0" \
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"flash_self_test=run nand_kernel;run setbootargs addtest; " \
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"upgrade_available;bootm ${kernel_ram};reset\0" \
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"hostname=systemone\0" \
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"kernel_Off=0x00200000\0" \
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"kernel_Off_fallback=0x03800000\0" \
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"kernel_ram=0x21500000\0" \
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"kernel_size=0x00400000\0" \
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"kernel_size_fallback=0x00400000\0" \
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"loads_echo=1\0" \
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"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
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"${kernel_size}\0" \
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"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
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"run nfsargs;run addip;upgrade_available;bootm " \
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"${kernel_ram};reset\0" \
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"netdev=eth0\0" \
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"nfsargs=run root_path;setenv bootargs ${bootargs} " \
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"root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
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"at91sam9_wdt.wdt_timeout=16\0" \
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"partitionset_active=A\0" \
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"preboot=echo;echo Type 'run flash_self' to use kernel and root "\
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"filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
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"from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
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"to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
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"project_dir=systemone\0" \
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"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
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"rootfs=/dev/mtdblock5\0" \
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"rootfs_fallback=/dev/mtdblock7\0" \
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"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
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"root=${rootfs} rootfstype=jffs2 panic=7 " \
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"at91sam9_wdt.wdt_timeout=16\0" \
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"stderr=serial\0" \
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"stdin=serial\0" \
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"stdout=serial\0" \
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"upgrade_available=0\0"
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#endif
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#if defined(CONFIG_BOARD_TAURUS)
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#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
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#endif
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#if defined(CONFIG_BOARD_AXM)
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#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
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#endif
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN \
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ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
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/* Defines for SPL */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x0
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#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
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#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
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#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
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CONFIG_SYS_MALLOC_LEN)
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#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
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#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
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#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SYS_USE_NANDFLASH 1
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SPL_NAND_RAW_ONLY
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#define CONFIG_SPL_NAND_SOFTECC
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
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#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
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#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
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#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
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48, 49, 50, 51, 52, 53, 54, 55, \
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56, 57, 58, 59, 60, 61, 62, 63, }
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#define CONFIG_SPL_ATMEL_SIZE
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#define CONFIG_SYS_MASTER_CLOCK 132096000
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#define AT91_PLL_LOCK_TIMEOUT 1000000
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#define CONFIG_SYS_AT91_PLLA 0x202A3F01
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#define CONFIG_SYS_MCKR 0x1300
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#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
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#define CONFIG_SYS_AT91_PLLB 0x10193F05
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#endif
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