mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 00:48:52 +09:00
067716bac5
This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
274 lines
5.1 KiB
C
274 lines
5.1 KiB
C
/*
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* LG Optimus Black codename sniper config
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*
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* Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/cpu.h>
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#include <asm/arch/omap.h>
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/*
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* CPU
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*/
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#define CONFIG_ARM_ARCH_CP15_ERRATA
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#define CONFIG_ARM_ERRATA_454179
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#define CONFIG_ARM_ERRATA_430973
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#define CONFIG_ARM_ERRATA_621766
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/*
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* Platform
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*/
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#define CONFIG_OMAP
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#define CONFIG_OMAP_COMMON
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/*
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* Board
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*/
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#define CONFIG_MISC_INIT_R
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/*
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* Clocks
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*/
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#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
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#define CONFIG_SYS_PTV 2
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#define V_NS16550_CLK 48000000
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#define V_OSCK 26000000
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#define V_SCLK (V_OSCK >> 1)
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/*
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* DRAM
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*/
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#define CONFIG_SDRC
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#define CONFIG_NR_DRAM_BANKS 2
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*
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* Memory
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*/
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#define CONFIG_SYS_TEXT_BASE 0x80100000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
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/*
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* GPIO
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*/
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#define CONFIG_OMAP_GPIO
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#define CONFIG_OMAP3_GPIO_2
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#define CONFIG_OMAP3_GPIO_3
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#define CONFIG_OMAP3_GPIO_4
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#define CONFIG_OMAP3_GPIO_5
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#define CONFIG_OMAP3_GPIO_6
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/*
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* I2C
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_I2C_MULTI_BUS
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/*
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* Flash
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*/
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#define CONFIG_SYS_NO_FLASH
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/*
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* MMC
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*/
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_OMAP_HSMMC
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/*
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* Power
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*/
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#define CONFIG_TWL4030_POWER
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/*
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* Input
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*/
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#define CONFIG_TWL4030_INPUT
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/*
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* Partitions
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*/
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#define CONFIG_PARTITION_UUIDS
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#define CONFIG_CMD_PART
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/*
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* SPL
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*/
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x40200000
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#define CONFIG_SPL_MAX_SIZE (54 * 1024)
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#define CONFIG_SPL_BSS_START_ADDR 0x80000000
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#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
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#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
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#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
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#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_POWER_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 2
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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/*
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* Console
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*/
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_CBSIZE 512
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
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+ 16)
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/*
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* Serial
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*/
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#endif
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
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#define CONFIG_CONS_INDEX 3
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
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115200 }
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/*
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* USB gadget
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*/
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#define CONFIG_USB_MUSB_PIO_ONLY
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#define CONFIG_USB_MUSB_OMAP2PLUS
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#define CONFIG_TWL4030_USB
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/*
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* Fastboot
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*/
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#define CONFIG_USB_FUNCTION_FASTBOOT
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#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
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#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
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#define CONFIG_FASTBOOT_FLASH
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#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
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#define CONFIG_CMD_FASTBOOT
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/*
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* Environment
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*/
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#define CONFIG_ENV_SIZE (128 * 1024)
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel_addr_r=0x82000000\0" \
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"loadaddr=0x82000000\0" \
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"fdt_addr_r=0x88000000\0" \
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"fdtaddr=0x88000000\0" \
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"ramdisk_addr_r=0x88080000\0" \
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"pxefile_addr_r=0x80100000\0" \
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"scriptaddr=0x80000000\0" \
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"bootm_size=0x10000000\0" \
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"boot_mmc_dev=0\0" \
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"kernel_mmc_part=3\0" \
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"recovery_mmc_part=4\0" \
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"fdtfile=omap3-sniper.dtb\0" \
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"bootfile=/boot/extlinux/extlinux.conf\0" \
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"bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
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/*
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* ATAGs
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*/
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SERIAL_TAG
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/*
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* Boot
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*/
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#define CONFIG_SYS_LOAD_ADDR 0x82000000
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#define CONFIG_ANDROID_BOOT_IMAGE
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#define CONFIG_BOOTCOMMAND \
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"setenv boot_mmc_part ${kernel_mmc_part}; " \
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"if test reboot-${reboot-mode} = reboot-r; then " \
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"echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \
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"if test reboot-${reboot-mode} = reboot-b; then " \
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"echo fastboot; fastboot 0; fi; " \
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"part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \
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"part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \
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"mmc dev ${boot_mmc_dev}; " \
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"mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \
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"bootm ${kernel_addr_r};"
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/*
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* Defaults
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*/
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#include <config_defaults.h>
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#include <config_distro_defaults.h>
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#endif
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