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https://github.com/brain-hackers/u-boot-brain
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ca1a4c8632
Move the gdsys Controlcenter DC specific build time kwbimage.cfg generation code into the mach-mvebu/ directory to be shared by all 32bit mvebu platforms. Remove board specific kwbimage.cfg files, and use the generated one instead. These files are all identical, with two exceptions. Clearfog and Helios4 use the sdio boot device, whereas all others use spi. Update the defconfigs for the exceptional boards to generate the same kwbimage.cfg as before. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
99 lines
2.3 KiB
C
99 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2011
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Lei Wen <leiwen@marvell.com>
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*/
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/*
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* This file should be included in board config header file.
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*
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* It supports common definitions for MVEBU platforms
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*/
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#ifndef _MVEBU_CONFIG_H
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#define _MVEBU_CONFIG_H
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#include <asm/arch/soc.h>
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#if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \
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|| defined(CONFIG_ARMADA_38X)
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/*
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* Set this for the common xor register definitions needed in dram.c
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* for A38x as well here.
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*/
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#define MV88F78X60 /* for the DDR training bin_hdr code */
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#endif
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#define CONFIG_SYS_L2_PL310
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
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#endif
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/*
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* By default the generated mvebu kwbimage.cfg is used
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* If for some board, different configuration file need to be used,
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* CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
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*/
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#ifndef CONFIG_SYS_KWD_CONFIG
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#define CONFIG_SYS_KWD_CONFIG arch/arm/mach-mvebu/kwbimage.cfg
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#endif /* CONFIG_SYS_KWD_CONFIG */
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/* Add target to build it automatically upon "make" */
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#ifdef CONFIG_SPL
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#define CONFIG_BUILD_TARGET "u-boot-spl.kwb"
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#endif
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/* end of 16M scrubbed by training in bootrom */
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#define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000
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#define CONFIG_NR_DRAM_BANKS_MAX 2
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#define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE
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/*
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* SPI Flash configuration
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*/
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#ifdef CONFIG_CMD_SF
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#ifndef CONFIG_ENV_SPI_BUS
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# define CONFIG_ENV_SPI_BUS 0
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#endif
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#ifndef CONFIG_ENV_SPI_CS
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# define CONFIG_ENV_SPI_CS 0
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#endif
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#ifndef CONFIG_ENV_SPI_MAX_HZ
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# define CONFIG_ENV_SPI_MAX_HZ 50000000
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#endif
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#endif
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/* Needed for SPI NOR booting in SPL */
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#define CONFIG_DM_SEQ_ALIAS 1
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/*
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* Ethernet Driver configuration
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*/
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#ifdef CONFIG_CMD_NET
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#define CONFIG_MII /* expose smi ove miiphy interface */
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#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
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#define CONFIG_ARP_TIMEOUT 200
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#define CONFIG_NET_RETRY_COUNT 50
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#endif /* CONFIG_CMD_NET */
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/*
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* I2C related stuff
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*/
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#ifdef CONFIG_CMD_I2C
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#ifndef CONFIG_SYS_I2C_SOFT
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#define CONFIG_I2C_MVTWSI
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#endif
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#define CONFIG_SYS_I2C_SLAVE 0x0
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#define CONFIG_SYS_I2C_SPEED 100000
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#endif
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/* Use common timer */
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
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#define CONFIG_SYS_TIMER_RATE 25000000
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#endif /* __MVEBU_CONFIG_H */
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