mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-31 22:39:08 +09:00
![Sébastien Szymanski](/assets/img/avatar_default.png)
Since commit commit152038ea18
("i.MX6UL: icore: Add SPL_OF_CONTROL support") the OPOS6UL board doesn't boot anymore. Adding SPL_DM support makes the board boot again. Fixes: commit152038ea18
("i.MX6UL: icore: Add SPL_OF_CONTROL support") Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
415 lines
10 KiB
Plaintext
415 lines
10 KiB
Plaintext
/*
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* Copyright 2017 Armadeus Systems <support@armadeus.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this file; if not, write to the Free
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* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "imx6ul-opos6ul.dtsi"
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/ {
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model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board";
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compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul";
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chosen {
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stdout-path = &uart1;
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};
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm3 0 191000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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power-supply = <®_5v>;
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status = "okay";
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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user-button {
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label = "User button";
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gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_MISC>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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user-led {
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label = "User";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_led>;
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gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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onewire {
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compatible = "w1-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_w1>;
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gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_usbotg1_vbus: regulator-usbotg1vbus {
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compatible = "regulator-fixed";
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regulator-name = "usbotg1vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg1_vbus>;
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gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usbotg2_vbus: regulator-usbotg2vbus {
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compatible = "regulator-fixed";
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regulator-name = "usbotg2vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg2_vbus>;
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gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&adc1 {
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vref-supply = <®_3v3>;
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status = "okay";
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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xceiver-supply = <®_5v>;
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status = "okay";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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xceiver-supply = <®_5v>;
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status = "okay";
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};
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&ecspi4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi4>;
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cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
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status = "okay";
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spidev0: spi@0 {
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compatible = "spidev";
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reg = <0>;
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spi-max-frequency = <5000000>;
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};
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spidev1: spi@1 {
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compatible = "spidev";
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reg = <1>;
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spi-max-frequency = <5000000>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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clock_frequency = <400000>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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clock_frequency = <400000>;
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status = "okay";
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};
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&lcdif {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcdif>;
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display = <&display0>;
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lcd-supply = <®_3v3>;
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status = "okay";
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display0: display0 {
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bits-per-pixel = <32>;
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bus-width = <18>;
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display-timings {
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timing0: timing0 {
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clock-frequency = <33000033>;
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hactive = <800>;
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vactive = <480>;
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hback-porch = <96>;
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hfront-porch = <96>;
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vback-porch = <20>;
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vfront-porch = <21>;
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hsync-len = <64>;
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vsync-len = <4>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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};
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};
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&pwm3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm3>;
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status = "okay";
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};
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&snvs_pwrkey {
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status = "disabled";
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};
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&tsc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tsc>;
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xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
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measure-delay-time = <0xffff>;
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pre-charge-time = <0xffff>;
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status = "okay";
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};
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&uart1 {
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u-boot,dm-spl;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbotg1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg1_id>;
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vbus-supply = <®_usbotg1_vbus>;
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dr_mode = "otg";
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disable-over-current;
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status = "okay";
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};
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&usbotg2 {
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vbus-supply = <®_usbotg2_vbus>;
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dr_mode = "host";
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disable-over-current;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpios>;
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pinctrl_ecspi4: ecspi4grp {
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fsl,pins = <
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MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b0b0
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MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI 0x1b0b0
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MX6UL_PAD_NAND_DATA06__ECSPI4_MISO 0x1b0b0
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MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x1b0b0
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MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x1b0b0
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x0b0b0
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MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x0b0b0
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x0b0b0
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MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x0b0b0
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>;
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};
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pinctrl_gpios: gpiosgrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x0b0b0
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MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x0b0b0
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MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x0b0b0
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MX6UL_PAD_NAND_RE_B__GPIO4_IO00 0x0b0b0
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MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x0b0b0
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MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0b0b0
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MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0b0b0
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MX6UL_PAD_NAND_WE_B__GPIO4_IO01 0x0b0b0
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MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
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MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
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MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
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MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
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MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
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MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
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MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
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MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
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>;
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};
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pinctrl_gpio_keys: gpiokeysgrp {
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fsl,pins = <
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MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0b0b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
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MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
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MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
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>;
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};
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pinctrl_lcdif: lcdifgrp {
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fsl,pins = <
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MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x100b1
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MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x100b1
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MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x100b1
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MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x100b1
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MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x100b1
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MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x100b1
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MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x100b1
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MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x100b1
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MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x100b1
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MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x100b1
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MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x100b1
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MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x100b1
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MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x100b1
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MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x100b1
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MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x100b1
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MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x100b1
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MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x100b1
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MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x100b1
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MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x100b1
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MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x100b1
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MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x100b1
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MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x100b1
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>;
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};
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pinctrl_led: ledgrp {
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fsl,pins = <
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MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x0b0b0
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>;
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};
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pinctrl_pwm3: pwm3grp {
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fsl,pins = <
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MX6UL_PAD_NAND_ALE__PWM3_OUT 0x1b0b0
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>;
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};
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pinctrl_tsc: tscgrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
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MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
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MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
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MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
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>;
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};
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pinctrl_uart1: uart1grp {
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u-boot,dm-spl;
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fsl,pins = <
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MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
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MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
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MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
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>;
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};
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pinctrl_usbotg1_id: usbotg1idgrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x1b0b0
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>;
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};
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pinctrl_usbotg1_vbus: usbotg1vbusgrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x1b0b0
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>;
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};
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pinctrl_usbotg2_vbus: usbotg2vbusgrp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
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>;
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};
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pinctrl_w1: w1grp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
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>;
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};
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};
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