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https://github.com/brain-hackers/u-boot-brain
synced 2024-09-07 13:23:20 +09:00
![Philipp Tomsich](/assets/img/avatar_default.png)
The RK3399 does not have any boot selection pins and the BootROM probes the boot interfaces using the following boot-order: 1. SPI 2. eMMC (sdhci in DTS) 3. SD card (sdmmc in DTS) 4. USB loader For ease of deployment, the SPL stage should mirror the boot order of the ROM and use the same probing order (assuming that valid images can be detected by SPL) unless instructed otherwise. The boot-order can then be configured via the 'u-boot,spl-boot-order' property in the chosen-node of the DTS. While this approach is easily extensible to other boards, it is only implemented for the RK3399 for now, as the large SRAM on the RK3399 makes this easy to fit the needed infrastructure into SPL and our production setup already runs with DM, OF_CONTROL and BLK in SPL. The new boot-order property is expected to be used in conjunction with FIT images (and all legacy image formats disabled via Kconfig). A boot-sequence with probing and fallthroughs from SPI via eMMC to SD card (i.e. &spiflash, &sdhci, &sdmmc) has been validated on the RK3399-Q7. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
258 lines
5.8 KiB
C
258 lines
5.8 KiB
C
/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <led.h>
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#include <malloc.h>
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#include <mmc.h>
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#include <ram.h>
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#include <spl.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/periph.h>
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#include <asm/arch/sdram.h>
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#include <asm/arch/timer.h>
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#include <dm/pinctrl.h>
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#include <dm/root.h>
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#include <dm/test.h>
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#include <dm/util.h>
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#include <power/regulator.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OF_CONTROL)
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static int spl_node_to_boot_device(int node)
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{
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struct udevice *parent;
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/*
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* This should eventually move into the SPL code, once SPL becomes
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* aware of the block-device layer. Until then (and to avoid unneeded
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* delays in getting this feature out, it lives at the board-level).
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*/
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if (!uclass_get_device_by_of_offset(UCLASS_MMC, node, &parent)) {
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struct udevice *dev;
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struct blk_desc *desc = NULL;
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for (device_find_first_child(parent, &dev);
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dev;
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device_find_next_child(&dev)) {
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if (device_get_uclass_id(dev) == UCLASS_BLK) {
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desc = dev_get_uclass_platdata(dev);
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break;
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}
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}
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if (!desc)
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return -ENOENT;
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switch (desc->devnum) {
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case 0:
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return BOOT_DEVICE_MMC1;
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case 1:
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return BOOT_DEVICE_MMC2;
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default:
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return -ENOSYS;
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}
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}
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/*
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* SPL doesn't differentiate SPI flashes, so we keep the detection
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* brief and inaccurate... hopefully, the common SPL layer can be
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* extended with awareness of the BLK layer (and matching OF_CONTROL)
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* soon.
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*/
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if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
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return BOOT_DEVICE_SPI;
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return -1;
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}
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void board_boot_order(u32 *spl_boot_list)
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{
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const void *blob = gd->fdt_blob;
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int chosen_node = fdt_path_offset(blob, "/chosen");
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int idx = 0;
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int elem;
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int boot_device;
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int node;
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const char *conf;
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if (chosen_node < 0) {
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debug("%s: /chosen not found, using spl_boot_device()\n",
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__func__);
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spl_boot_list[0] = spl_boot_device();
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return;
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}
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for (elem = 0;
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(conf = fdt_stringlist_get(blob, chosen_node,
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"u-boot,spl-boot-order", elem, NULL));
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elem++) {
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/* First check if the list element is an alias */
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const char *alias = fdt_get_alias(blob, conf);
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if (alias)
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conf = alias;
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/* Try to resolve the config item (or alias) as a path */
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node = fdt_path_offset(blob, conf);
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if (node < 0) {
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debug("%s: could not find %s in FDT", __func__, conf);
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continue;
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}
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/* Try to map this back onto SPL boot devices */
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boot_device = spl_node_to_boot_device(node);
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if (boot_device < 0) {
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debug("%s: could not map node @%x to a boot-device\n",
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__func__, node);
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continue;
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}
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spl_boot_list[idx++] = boot_device;
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}
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/* If we had no matches, fall back to spl_boot_device */
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if (idx == 0)
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spl_boot_list[0] = spl_boot_device();
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}
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#endif
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_MMC1;
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}
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u32 spl_boot_mode(const u32 boot_device)
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{
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return MMCSD_MODE_RAW;
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}
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#define TIMER_CHN10_BASE 0xff8680a0
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#define TIMER_END_COUNT_L 0x00
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#define TIMER_END_COUNT_H 0x04
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#define TIMER_INIT_COUNT_L 0x10
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#define TIMER_INIT_COUNT_H 0x14
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#define TIMER_CONTROL_REG 0x1c
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#define TIMER_EN 0x1
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#define TIMER_FMODE (0 << 1)
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#define TIMER_RMODE (1 << 1)
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void secure_timer_init(void)
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{
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writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
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writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
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writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
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writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
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writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
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}
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#define GRF_EMMCCORE_CON11 0xff77f02c
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void board_init_f(ulong dummy)
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{
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struct udevice *pinctrl;
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struct udevice *dev;
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int ret;
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/* Example code showing how to enable the debug UART on RK3288 */
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#include <asm/arch/grf_rk3399.h>
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/* Enable early UART2 channel C on the RK3399 */
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#define GRF_BASE 0xff770000
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struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
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rk_clrsetreg(&grf->gpio4c_iomux,
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GRF_GPIO4C3_SEL_MASK,
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GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
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rk_clrsetreg(&grf->gpio4c_iomux,
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GRF_GPIO4C4_SEL_MASK,
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GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
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/* Set channel C as UART2 input */
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rk_clrsetreg(&grf->soc_con7,
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GRF_UART_DBG_SEL_MASK,
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GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
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#define EARLY_UART
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#ifdef EARLY_UART
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/*
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* Debug UART can be used from here if required:
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*
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* debug_uart_init();
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* printch('a');
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* printhex8(0x1234);
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* printascii("string");
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*/
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debug_uart_init();
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printascii("U-Boot SPL board init");
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#endif
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/* Emmc clock generator: disable the clock multipilier */
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rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
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ret = spl_early_init();
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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hang();
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}
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secure_timer_init();
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("Pinctrl init failed: %d\n", ret);
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return;
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}
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return;
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}
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}
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void spl_board_init(void)
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{
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struct udevice *pinctrl;
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int ret;
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("%s: Cannot find pinctrl device\n", __func__);
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goto err;
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}
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/* Enable debug UART */
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
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if (ret) {
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debug("%s: Failed to set up console UART\n", __func__);
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goto err;
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}
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preloader_console_init();
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#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
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back_to_bootrom();
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#endif
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return;
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err:
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printf("spl_board_init: Error %d\n", ret);
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/* No way to report error here */
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hang();
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}
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* Just empty function now - can't decide what to choose */
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debug("%s: %s\n", __func__, name);
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return 0;
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}
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#endif
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