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https://github.com/brain-hackers/u-boot-brain
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![Vipin KUMAR](/assets/img/avatar_default.png)
The earlier usb device controller driver was specific to spear platforms. This patch implements the usb device controller driver as a generic controller which can be reused by other platforms using this peripheral. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Marek Vasut <marex@denx.de>
227 lines
6.2 KiB
C
227 lines
6.2 KiB
C
/*
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* (C) Copyright 2009
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* Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _SPEAR_COMMON_H
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#define _SPEAR_COMMON_H
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/*
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* Common configurations used for both spear3xx as well as spear6xx
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*/
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/* USBD driver configuration */
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#define CONFIG_DW_UDC
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#define CONFIG_USB_DEVICE
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#define CONFIG_USB_TTY
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#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC"
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#define CONFIG_USBD_MANUFACTURER "ST Microelectronics"
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#if defined(CONFIG_USB_TTY)
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#define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0"
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#endif
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/* I2C driver configuration */
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#define CONFIG_HARD_I2C
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#define CONFIG_SPEAR_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#define CONFIG_SYS_I2C_SLAVE 0x02
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#define CONFIG_I2C_CHIPADDRESS 0x50
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/* Timer, HZ specific defines */
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#define CONFIG_SYS_HZ (1000)
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#define CONFIG_SYS_HZ_CLOCK (8300000)
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/* Flash configuration */
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#if defined(CONFIG_FLASH_PNOR)
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#define CONFIG_SPEAR_EMI 1
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#else
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#define CONFIG_SPEARSMI 1
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#endif
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#if defined(CONFIG_SPEARSMI)
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#define CONFIG_SYS_MAX_FLASH_BANKS 2
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#define CONFIG_SYS_FLASH_BASE (0xF8000000)
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#define CONFIG_SYS_CS1_FLASH_BASE (0xF9000000)
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#define CONFIG_SYS_FLASH_BANK_SIZE (0x01000000)
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#define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \
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CONFIG_SYS_CS1_FLASH_BASE}
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#define CONFIG_SYS_FLASH_EMPTY_INFO 1
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#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ)
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#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ)
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#endif
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/*
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* Serial Configuration (PL011)
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* CONFIG_PL01x_PORTS is defined in specific files
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*/
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#define CONFIG_PL011_SERIAL
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#define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
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57600, 115200 }
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#define CONFIG_SYS_LOADS_BAUD_CHANGE
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/* NAND FLASH Configuration */
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_NAND_SPEAR 1
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_MTD_NAND_VERIFY_WRITE 1
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/*
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* Command support defines
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*/
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_ENV
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_RUN
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#define CONFIG_CMD_SAVES
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/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_NFS
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/*
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* Default Environment Varible definitions
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*/
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#if defined(CONFIG_SPEAR_USBTTY)
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#define CONFIG_BOOTDELAY -1
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#else
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#define CONFIG_BOOTDELAY 1
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#endif
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#define CONFIG_ENV_OVERWRITE
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/*
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* U-Boot Environment placing definitions.
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*/
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#if defined(CONFIG_ENV_IS_IN_FLASH)
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#ifdef CONFIG_SPEARSMI
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/*
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* Environment is in serial NOR flash
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*/
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#define CONFIG_SYS_MONITOR_LEN 0x00040000
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#define CONFIG_ENV_SECT_SIZE 0x00010000
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#define CONFIG_FSMTDBLK "/dev/mtdblock8 "
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#define CONFIG_BOOTCOMMAND "bootm 0xf8050000"
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#elif defined(CONFIG_SPEAR_EMI)
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/*
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* Environment is in parallel NOR flash
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*/
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#define CONFIG_SYS_MONITOR_LEN 0x00060000
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#define CONFIG_ENV_SECT_SIZE 0x00020000
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#define CONFIG_FSMTDBLK "/dev/mtdblock3 "
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#define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \
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"0x4C0000; bootm 0x1600000"
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#endif
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
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CONFIG_SYS_MONITOR_LEN)
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#elif defined(CONFIG_ENV_IS_IN_NAND)
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/*
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* Environment is in NAND
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*/
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#define CONFIG_ENV_OFFSET 0x60000
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#define CONFIG_ENV_RANGE 0x10000
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#define CONFIG_FSMTDBLK "/dev/mtdblock12 "
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#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \
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"0x80000 0x4C0000; " \
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"bootm 0x1600000"
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#endif
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#define CONFIG_BOOTARGS_NFS "root=/dev/nfs ip=dhcp " \
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"console=ttyS0 init=/bin/sh"
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#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \
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"root="CONFIG_FSMTDBLK \
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"rootfstype=jffs2"
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#define CONFIG_ENV_SIZE 0x02000
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/* Miscellaneous configurable options */
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#define CONFIG_BOOT_PARAMS_ADDR 0x00000100
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#define CONFIG_CMDLINE_TAG 1
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_MISC_INIT_R 1
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#define CONFIG_ZERO_BOOTDELAY_CHECK 1
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#define CONFIG_AUTOBOOT_KEYED 1
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#define CONFIG_AUTOBOOT_STOP_STR " "
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#define CONFIG_AUTOBOOT_PROMPT \
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"Hit SPACE in %d seconds to stop autoboot.\n", bootdelay
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#define CONFIG_SYS_MEMTEST_START 0x00800000
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#define CONFIG_SYS_MEMTEST_END 0x04000000
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#define CONFIG_SYS_MALLOC_LEN (1024*1024)
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#define CONFIG_IDENT_STRING "-SPEAr"
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PROMPT "u-boot> "
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_LOAD_ADDR 0x00800000
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#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
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#define CONFIG_SYS_64BIT_VSPRINTF 1
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#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY
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/* Stack sizes */
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#define CONFIG_STACKSIZE (128*1024)
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024)
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#define CONFIG_STACKSIZE_FIQ (4*1024)
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#endif
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 0x00000000
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#define PHYS_SDRAM_1_MAXSIZE 0x40000000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#endif
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