mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 02:36:39 +09:00
df548d3c3e
Rewrite the resource management code (i.e. I/O memory, clock gating, gpio) so it doesn't depend on any global state. This is necessary because this code is heavily used before relocation to RAM, so we can't write to any global variables. As an added bonus, this makes u-boot's memory footprint a bit smaller, although some functionality has been left out; all clocks are enabled all the time, and there's no checking for gpio line conflicts. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
101 lines
2.4 KiB
C
101 lines
2.4 KiB
C
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <common.h>
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#ifdef CONFIG_ATMEL_USART
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#include <asm/io.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/memory-map.h>
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#if defined(CONFIG_USART0)
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# define USART_ID 0
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# define USART_BASE USART0_BASE
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#elif defined(CONFIG_USART1)
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# define USART_ID 1
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# define USART_BASE USART1_BASE
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#elif defined(CONFIG_USART2)
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# define USART_ID 2
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# define USART_BASE USART2_BASE
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#elif defined(CONFIG_USART3)
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# define USART_ID 3
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# define USART_BASE USART3_BASE
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#endif
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#include "atmel_usart.h"
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DECLARE_GLOBAL_DATA_PTR;
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void serial_setbrg(void)
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{
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unsigned long divisor;
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unsigned long usart_hz;
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/*
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* Master Clock
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* Baud Rate = --------------
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* 16 * CD
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*/
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usart_hz = get_usart_clk_rate(USART_ID);
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divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
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usart3_writel(BRGR, USART3_BF(CD, divisor));
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}
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int serial_init(void)
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{
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usart3_writel(CR, USART3_BIT(RSTRX) | USART3_BIT(RSTTX));
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serial_setbrg();
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usart3_writel(CR, USART3_BIT(RXEN) | USART3_BIT(TXEN));
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usart3_writel(MR, (USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
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| USART3_BF(USCLKS, USART3_USCLKS_MCK)
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| USART3_BF(CHRL, USART3_CHRL_8)
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| USART3_BF(PAR, USART3_PAR_NONE)
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| USART3_BF(NBSTOP, USART3_NBSTOP_1)));
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return 0;
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}
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void serial_putc(char c)
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{
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if (c == '\n')
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serial_putc('\r');
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while (!(usart3_readl(CSR) & USART3_BIT(TXRDY))) ;
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usart3_writel(THR, c);
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}
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void serial_puts(const char *s)
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{
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while (*s)
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serial_putc(*s++);
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}
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int serial_getc(void)
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{
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while (!(usart3_readl(CSR) & USART3_BIT(RXRDY))) ;
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return usart3_readl(RHR);
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}
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int serial_tstc(void)
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{
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return (usart3_readl(CSR) & USART3_BIT(RXRDY)) != 0;
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}
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#endif /* CONFIG_ATMEL_USART */
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