mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-18 00:57:59 +09:00
c8fd8e66cd
On warm reset, all cores jump to the low_power_start function because iRAM data is retained and because while executing iROM code all cores find the jump flag 0x02020028 set. In low_power_start, cores check the reset status and if true they clear the jump flag and jump back to 0x0. The A7 cores do jump to 0x0 but consider following instructions as a Thumb instructions which in turn makes them loop inside the iROM code instead of jumping to power_down_core. This issue is fixed by replacing the "mov pc" instruction with a "bx" instruction which switches state along with the jump to make the execution unit consider the branch target as an ARM instruction. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
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| .. | ||
| clock_init_exynos4.c | ||
| clock_init_exynos5.c | ||
| clock_init.h | ||
| clock.c | ||
| common_setup.h | ||
| config.mk | ||
| dmc_common.c | ||
| dmc_init_ddr3.c | ||
| dmc_init_exynos4.c | ||
| exynos4_setup.h | ||
| exynos5_setup.h | ||
| Kconfig | ||
| lowlevel_init.c | ||
| Makefile | ||
| pinmux.c | ||
| power.c | ||
| sec_boot.S | ||
| soc.c | ||
| spl_boot.c | ||
| system.c | ||
| tzpc.c | ||