mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-07 21:33:24 +09:00
![Park, Aiden](/assets/img/avatar_default.png)
Slim Bootloader already calibrated TSC and provides it to U-Boot. Therefore, U-Boot does not have to re-calibrate TSC. Configuring tsc_base and clock_rate makes x86 tsc_timer driver bypass TSC calibration and use the provided TSC frequency. - Get TSC frequency from performance info hob - Set tsc_base and clock_rate for tsc_timer driver Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
116 lines
3.1 KiB
C
116 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2019 Intel Corporation <www.intel.com>
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*/
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#ifndef __SLIMBOOTLOADER_ARCH_H__
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#define __SLIMBOOTLOADER_ARCH_H__
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#include <common.h>
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#include <asm/hob.h>
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/**
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* A GUID to get MemoryMap info hob which is provided by Slim Bootloader
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*/
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#define SBL_MEMORY_MAP_INFO_GUID \
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EFI_GUID(0xa1ff7424, 0x7a1a, 0x478e, \
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0xa9, 0xe4, 0x92, 0xf3, 0x57, 0xd1, 0x28, 0x32)
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/**
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* A GUID to get SerialPort info hob which is provided by Slim Bootloader
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*/
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#define SBL_SERIAL_PORT_INFO_GUID \
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EFI_GUID(0x6c6872fe, 0x56a9, 0x4403, \
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0xbb, 0x98, 0x95, 0x8d, 0x62, 0xde, 0x87, 0xf1)
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/**
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* A GUID to get boot performance info hob which is provided by Slim Bootloader
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*/
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#define SBL_PERFORMANCE_INFO_GUID \
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EFI_GUID(0x868204be, 0x23d0, 0x4ff9, \
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0xac, 0x34, 0xb9, 0x95, 0xac, 0x04, 0xb1, 0xb9)
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/**
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* A single entry of memory map information
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*
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* @addr: start address of a memory map entry
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* @size: size of a memory map entry
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* @type: usable:1, reserved:2, acpi:3, nvs:4, unusable:5
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* @flag: only used in Slim Bootloader
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* @rsvd: padding for alignment
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*/
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struct sbl_memory_map_entry {
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u64 addr;
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u64 size;
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u8 type;
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u8 flag;
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u8 rsvd[6];
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};
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/**
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* This includes all memory map entries which is sorted based on physical start
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* address, from low to high, and carved out reserved, acpi nvs, acpi reclaim
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* and usable memory.
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*
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* @rev : revision of memory_map_info structure. currently 1.
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* @rsvd : padding for alignment
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* @count: the number of memory map entries
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* @entry: array of all memory map entries
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*/
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struct sbl_memory_map_info {
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u8 rev;
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u8 rsvd[3];
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u32 count;
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struct sbl_memory_map_entry entry[0];
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};
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/**
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* This includes serial port info which has already been initialized in previous
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* Slim Bootloader stage.
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* The Slim Bootloader initializes serial port regardless of debug/release build
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* modes, and it passes the information to a payload thru hob. So, a payload can
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* re-use the serial information without re-initializing serial port.
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*
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* @rev : revision of serial_port_info structure. currently 1.
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* @rsvd : padding for alignment
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* @type : port io: 1, mmio: 2
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* @base : io base address. ex) 0x3f8, 0x80001000
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* @baud : uart baud rate
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* @stride: register stride in Bytes
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* @clk : uart frequency in Hz
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* @rsvd1 : reserved
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*/
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struct sbl_serial_port_info {
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u8 rev;
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u8 rsvd[3];
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u32 type;
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u32 base;
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u32 baud;
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u32 stride;
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u32 clk;
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u32 rsvd1;
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};
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/**
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* This includes timestamp data which has been collected in Slim Bootloader
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* stages from the reset vector. In addition, this has TSC frequency in KHz to
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* calculate each timestamp.
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*
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* @rev : revision of performance_info structure. currently 1.
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* @rsvd : padding for alignment
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* @count : the number of collected timestamp data
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* @flags : only used in Slim Bootloader
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* @frequency: tsc frequency in KHz
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* @timestamp: the array of timestamp data which has 64-bit tsc value
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*/
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struct sbl_performance_info {
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u8 rev;
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u8 rsvd[3];
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u16 count;
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u16 flags;
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u32 frequency;
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u64 timestamp[0];
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};
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#endif /* __SLIMBOOTLOADER_ARCH_H__ */
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