u-boot-brain/board/synopsys/axs101
Alexey Brodkin c7d8db66ff board: axs10x: Flush entire cache after programming reset vector
Now when we have support of IOC (IO-Coherency block) cahce operations
on regions are tuned to not be dummy stubs if IOC was found and enabled
in the core. That makes flush_dcache_range() useless for our purposes
here. And since we do need to flush modified reset vector to at least L2
cache (AKA SLC) so other cores will see it via its L1 instruction cache
we're using always functional flush_dcache_all() here.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
2016-06-13 14:38:05 +02:00
..
axs10x.h board: axs10x - support v3 mother-board 2015-04-09 20:00:46 +03:00
axs101.c board: axs10x: Flush entire cache after programming reset vector 2016-06-13 14:38:05 +02:00
Kconfig board/synopsys: remove selection of CPU from the board 2015-01-15 22:40:49 +03:00
MAINTAINERS board: axs103 - add maintainer information 2015-07-01 17:19:33 +03:00
Makefile arc: add AXS101 board support 2014-02-07 08:14:33 -05:00
nand.c board: axs10x - support v3 mother-board 2015-04-09 20:00:46 +03:00