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https://github.com/brain-hackers/u-boot-brain
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720620e691
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86 lines
1.8 KiB
C
86 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
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* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
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*/
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#include <common.h>
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#include <dm.h>
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#include <clk.h>
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#include <timer.h>
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#include <linux/err.h>
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#include <asm/io.h>
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#include <asm/arch-armv7/globaltimer.h>
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struct sti_timer_priv {
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struct globaltimer *global_timer;
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};
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static u64 sti_timer_get_count(struct udevice *dev)
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{
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struct sti_timer_priv *priv = dev_get_priv(dev);
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struct globaltimer *global_timer = priv->global_timer;
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u32 low, high;
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u64 timer;
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u32 old = readl(&global_timer->cnt_h);
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while (1) {
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low = readl(&global_timer->cnt_l);
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high = readl(&global_timer->cnt_h);
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if (old == high)
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break;
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else
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old = high;
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}
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timer = high;
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return (u64)((timer << 32) | low);
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}
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static int sti_timer_probe(struct udevice *dev)
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{
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struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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struct sti_timer_priv *priv = dev_get_priv(dev);
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struct clk clk;
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int err;
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ulong ret;
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/* get arm global timer base address */
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priv->global_timer = (struct globaltimer *)dev_read_addr_ptr(dev);
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if (!priv->global_timer)
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return -ENOENT;
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err = clk_get_by_index(dev, 0, &clk);
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if (!err) {
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ret = clk_get_rate(&clk);
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if (IS_ERR_VALUE(ret))
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return ret;
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uc_priv->clock_rate = ret;
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} else {
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uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK;
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}
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/* init timer */
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writel(0x01, &priv->global_timer->ctl);
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return 0;
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}
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static const struct timer_ops sti_timer_ops = {
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.get_count = sti_timer_get_count,
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};
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static const struct udevice_id sti_timer_ids[] = {
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{ .compatible = "arm,cortex-a9-global-timer" },
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{}
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};
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U_BOOT_DRIVER(sti_timer) = {
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.name = "sti_timer",
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.id = UCLASS_TIMER,
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.of_match = sti_timer_ids,
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.priv_auto = sizeof(struct sti_timer_priv),
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.probe = sti_timer_probe,
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.ops = &sti_timer_ops,
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};
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