mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-13 14:46:21 +09:00
c70564e6b1
We load the secondary stage u-boot image from NAND to system memory by nand_load, but we did not flush d-cache to memory, nor invalidate i-cache before we jump to RAM. When the system has cache enabled and the TLB/page attribute of system memory is cacheable, it will cause issues. - 83xx family is using the d-cache lock, so all of d-cache access is cache-inhibited. so you can't see the issue. - 85xx family is using d-cache, i-cache enable, partial cache lock. you will see the issue. This patch fixes the cache issue. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
106 lines
3.0 KiB
Makefile
106 lines
3.0 KiB
Makefile
#
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# (C) Copyright 2007
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# Stefan Roese, DENX Software Engineering, sr@denx.de.
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# (C) Copyright 2008 Freescale Semiconductor
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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NAND_SPL := y
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TEXT_BASE := 0xfff00000
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PAD_TO := 0xfff04000
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include $(TOPDIR)/config.mk
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LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
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LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
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AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o ticks.o
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COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
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time.o cache.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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__OBJS := $(SOBJS) $(COBJS)
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LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
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nandobj := $(OBJTREE)/nand_spl/
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ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
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all: $(obj).depend $(ALL)
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$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
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$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
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$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
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$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
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$(nandobj)u-boot-spl: $(OBJS)
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cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
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-Map $(nandobj)u-boot-spl.map \
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-o $(nandobj)u-boot-spl
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# create symbolic links for common files
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$(obj)start.S:
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ln -sf $(SRCTREE)/cpu/mpc83xx/start.S $(obj)start.S
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$(obj)nand_boot_fsl_elbc.c:
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ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \
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$(obj)nand_boot_fsl_elbc.c
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$(obj)sdram.c:
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ln -sf $(SRCTREE)/board/$(BOARDDIR)/sdram.c $(obj)sdram.c
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$(obj)$(BOARD).c:
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ln -sf $(SRCTREE)/board/$(BOARDDIR)/$(BOARD).c $(obj)$(BOARD).c
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$(obj)ns16550.c:
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ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
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$(obj)nand_init.c:
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ln -sf $(SRCTREE)/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
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$(obj)cache.c:
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ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
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$(obj)time.c:
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ln -sf $(SRCTREE)/lib_ppc/time.c $(obj)time.c
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$(obj)ticks.S:
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ln -sf $(SRCTREE)/lib_ppc/ticks.S $(obj)ticks.S
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#########################################################################
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$(obj)%.o: $(obj)%.S
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$(CC) $(AFLAGS) -c -o $@ $<
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$(obj)%.o: $(obj)%.c
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$(CC) $(CFLAGS) -c -o $@ $<
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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