mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
193 lines
5.0 KiB
C
193 lines
5.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014 Samsung Electronics
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* Sanghee Kim <sh0130.kim@samsung.com>
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* Piotr Wilczek <p.wilczek@samsung.com>
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* Przemyslaw Marczak <p.marczak@samsung.com>
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*
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* Configuation settings for the Odroid-U3 (EXYNOS4412) board.
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*/
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#ifndef __CONFIG_ODROID_U3_H
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#define __CONFIG_ODROID_U3_H
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#include <configs/exynos4-common.h>
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#define CONFIG_SYS_L2CACHE_OFF
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#ifndef CONFIG_SYS_L2CACHE_OFF
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#define CONFIG_SYS_L2_PL310
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#define CONFIG_SYS_PL310_BASE 0x10502000
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#endif
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#define CONFIG_MACH_TYPE 4289
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#define CONFIG_NR_DRAM_BANKS 8
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
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/* Reserve the last 1 MiB for the secure firmware */
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#define CONFIG_SYS_MEM_TOP_HIDE (1UL << 20UL)
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#define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
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#include <linux/sizes.h>
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/* select serial console configuration */
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#define CONFIG_SERIAL1
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/* Console configuration */
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#define CONFIG_BOOTCOMMAND "run autoboot"
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#define CONFIG_DEFAULT_CONSOLE "ttySAC1,115200n8"
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
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- GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
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#define CONFIG_ENV_SIZE 4096
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#define CONFIG_ENV_OFFSET (SZ_1K * 1280) /* 1.25 MiB offset */
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#define CONFIG_ENV_OVERWRITE
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/* Partitions name */
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#define PARTS_BOOT "boot"
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#define PARTS_ROOT "platform"
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#define CONFIG_DFU_ALT \
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"uImage fat 0 1;" \
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"zImage fat 0 1;" \
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"Image.itb fat 0 1;" \
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"uInitrd fat 0 1;" \
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"exynos4412-odroidu3.dtb fat 0 1;" \
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"exynos4412-odroidx2.dtb fat 0 1;" \
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""PARTS_BOOT" part 0 1;" \
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""PARTS_ROOT" part 0 2\0" \
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#define CONFIG_SET_DFU_ALT_INFO
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#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K)
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#define CONFIG_DFU_ALT_BOOT_EMMC \
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"u-boot raw 0x3e 0x800 mmcpart 1;" \
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"bl1 raw 0x0 0x1e mmcpart 1;" \
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"bl2 raw 0x1e 0x1d mmcpart 1;" \
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"tzsw raw 0x83e 0x138 mmcpart 1\0"
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#define CONFIG_DFU_ALT_BOOT_SD \
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"u-boot raw 0x3f 0x800;" \
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"bl1 raw 0x1 0x1e;" \
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"bl2 raw 0x1f 0x1d;" \
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"tzsw raw 0x83f 0x138\0"
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/*
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* Bootable media layout:
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* dev: SD eMMC(part boot)
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* BL1 1 0
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* BL2 31 30
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* UBOOT 63 62
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* TZSW 2111 2110
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* ENV 2560 2560(part user)
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*
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* MBR Primary partiions:
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* Num Name Size Offset
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* 1. BOOT: 100MiB 2MiB
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* 2. ROOT: -
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadbootscript=load mmc ${mmcbootdev}:${mmcbootpart} ${scriptaddr} " \
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"boot.scr\0" \
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"loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \
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"${kernelname}\0" \
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"loadinitrd=load mmc ${mmcbootdev}:${mmcbootpart} ${initrdaddr} " \
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"${initrdname}\0" \
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"loaddtb=load mmc ${mmcbootdev}:${mmcbootpart} ${fdtaddr} " \
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"${fdtfile}\0" \
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"check_ramdisk=" \
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"if run loadinitrd; then " \
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"setenv initrd_addr ${initrdaddr};" \
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"else " \
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"setenv initrd_addr -;" \
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"fi;\0" \
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"check_dtb=" \
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"if run loaddtb; then " \
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"setenv fdt_addr ${fdtaddr};" \
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"else " \
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"setenv fdt_addr;" \
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"fi;\0" \
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"kernel_args=" \
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"setenv bootargs root=/dev/mmcblk${mmcrootdev}p${mmcrootpart}" \
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" rootwait ${console} ${opts}\0" \
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"boot_script=" \
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"run loadbootscript;" \
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"source ${scriptaddr}\0" \
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"boot_fit=" \
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"setenv kerneladdr 0x42000000;" \
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"setenv kernelname Image.itb;" \
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"run loadkernel;" \
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"run kernel_args;" \
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"bootm ${kerneladdr}#${boardname}\0" \
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"boot_uimg=" \
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"setenv kerneladdr 0x40007FC0;" \
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"setenv kernelname uImage;" \
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"run check_dtb;" \
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"run check_ramdisk;" \
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"run loadkernel;" \
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"run kernel_args;" \
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"bootm ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \
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"boot_zimg=" \
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"setenv kerneladdr 0x40007FC0;" \
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"setenv kernelname zImage;" \
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"run check_dtb;" \
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"run check_ramdisk;" \
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"run loadkernel;" \
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"run kernel_args;" \
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"bootz ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \
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"autoboot=" \
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"if test -e mmc 0 boot.scr; then; " \
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"run boot_script; " \
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"elif test -e mmc 0 Image.itb; then; " \
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"run boot_fit;" \
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"elif test -e mmc 0 zImage; then; " \
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"run boot_zimg;" \
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"elif test -e mmc 0 uImage; then; " \
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"run boot_uimg;" \
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"fi;\0" \
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"console=" CONFIG_DEFAULT_CONSOLE "\0" \
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"mmcbootdev=0\0" \
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"mmcbootpart=1\0" \
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"mmcrootdev=0\0" \
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"mmcrootpart=2\0" \
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"bootdelay=0\0" \
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"dfu_alt_system="CONFIG_DFU_ALT \
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"dfu_alt_info=Please reset the board\0" \
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"consoleon=set console console=ttySAC1,115200n8; save; reset\0" \
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"consoleoff=set console console=ram; save; reset\0" \
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"initrdname=uInitrd\0" \
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"initrdaddr=42000000\0" \
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"scriptaddr=0x42000000\0" \
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"fdtaddr=40800000\0"
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/* GPT */
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/* Security subsystem - enable hw_rand() */
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#define CONFIG_EXYNOS_ACE_SHA
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/* USB */
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#define CONFIG_USB_EHCI_EXYNOS
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/*
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* Supported Odroid boards: X3, U3
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* TODO: Add Odroid X support
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*/
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#define CONFIG_MISC_COMMON
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#define CONFIG_BOARD_TYPES
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#define CONFIG_MISC_INIT_R
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#undef CONFIG_REVISION_TAG
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#endif /* __CONFIG_H */
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