mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
36cb793b35
The MPU region dedicated for SDRAM for STM32F4 SoCs family was set to 16MB, but STM32F429 Evaluation board have 32MB of SDRAM. When kernel starts, only first 16MB of SDRAM are configured with XN (eXecute Never) bit disabled, whereas kernel is using 32MB. To avoid such situation in the future, extend this MPU region to 512MB as for STM32F7/H7. It fixes the following user land exception on STM32F429 Evaluation board : [ 1.713002] VFS: Mounted root (ext4 filesystem) readonly on device 179:2. [ 1.722605] devtmpfs: mounted [ 1.733057] Freeing unused kernel memory: 72K [ 1.737622] This architecture does not have kernel memory protection. [ 1.744070] Run /sbin/init as init process [ 1.906850] [ 1.906850] Unhandled exception: IPSR = 00000004 LR = fffffffd [ 1.914282] CPU: 0 PID: 1 Comm: init Not tainted 5.1.0-00002-gcf9ca5719954 #6 [ 1.921433] Hardware name: STM32 (Device Tree Support) [ 1.926601] PC is at 0x1a00b64 [ 1.929642] LR is at (null) [ 1.932669] pc : [<01a00b64>] lr : [<00000000>] psr: 01000000 [ 1.938993] sp : 01a5cfb0 ip : 00000000 fp : 00000000 [ 1.944269] r10: 01a43b00 r9 : 00000000 r8 : 00000000 [ 1.949564] r7 : 00000000 r6 : 00000000 r5 : 00000000 r4 : 00000000 [ 1.956168] r3 : 00000000 r2 : 00000000 r1 : 00000000 r0 : 00000000 [ 1.962701] xPSR: 01000000 [ 1.965506] CPU: 0 PID: 1 Comm: init Not tainted 5.1.0-00002-gcf9ca5719954 #6 [ 1.972658] Hardware name: STM32 (Device Tree Support) [ 1.978132] [<0000c009>] (unwind_backtrace) from [<0000b24f>] (show_stack+0xb/0xc) [ 1.986024] [<0000b24f>] (show_stack) from [<0000b947>] (__invalid_entry+0x4b/0x4c) Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
40 lines
910 B
C
40 lines
910 B
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
|
|
* Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
#include <asm/armv7_mpu.h>
|
|
|
|
int arch_cpu_init(void)
|
|
{
|
|
int i;
|
|
|
|
struct mpu_region_config stm32_region_config[] = {
|
|
/*
|
|
* Make SDRAM area cacheable & executable.
|
|
*/
|
|
#if defined(CONFIG_STM32F4)
|
|
{ 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
|
|
O_I_WB_RD_WR_ALLOC, REGION_512MB },
|
|
#endif
|
|
|
|
{ 0x90000000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
|
|
SHARED_WRITE_BUFFERED, REGION_256MB },
|
|
|
|
#if defined(CONFIG_STM32F7) || defined(CONFIG_STM32H7)
|
|
{ 0xC0000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
|
|
O_I_WB_RD_WR_ALLOC, REGION_512MB },
|
|
#endif
|
|
};
|
|
|
|
disable_mpu();
|
|
for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
|
|
mpu_config(&stm32_region_config[i]);
|
|
enable_mpu();
|
|
|
|
return 0;
|
|
}
|