mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-19 08:28:51 +09:00
![Tom Rini](/assets/img/avatar_default.png)
This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
232 lines
6.7 KiB
C
232 lines
6.7 KiB
C
/*
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* Copyright 2015 Toradex, Inc.
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*
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* Configuration settings for the Toradex VF50/VF61 module.
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*
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* Based on vf610twr.h:
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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#define CONFIG_VF610
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#define CONFIG_SYS_THUMB_BUILD
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#define CONFIG_USE_ARCH_MEMCPY
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#define CONFIG_USE_ARCH_MEMSET
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#define CONFIG_SYS_FSL_CLK
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_CMD_FUSE
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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#define CONFIG_BOARD_EARLY_INIT_F
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/* Allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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#define CONFIG_VERSION_VARIABLE
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#define CONFIG_BAUDRATE 115200
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/* NAND support */
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#define CONFIG_CMD_NAND
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
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/* Dynamic MTD partition support */
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#define CONFIG_CMD_MTDPARTS /* Enable 'mtdparts' command line support */
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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#define MTDIDS_DEFAULT "nand0=vf610_nfc"
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#define MTDPARTS_DEFAULT "mtdparts=vf610_nfc:" \
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"128k(vf-bcb)ro," \
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"1408k(u-boot)ro," \
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"512k(u-boot-env)," \
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"-(ubi)"
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#define CONFIG_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 1
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
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#define CONFIG_GENERIC_MMC
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#define CONFIG_DOS_PARTITION
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_CMD_UBI
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#define CONFIG_MTD_UBI_FASTMAP
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#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET1_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_IPADDR 192.168.10.2
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_SERVERIP 192.168.10.1
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_LOADADDR 0x80008000
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#define CONFIG_FDTADDR 0x84000000
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/* We boot from the gfxRAM area of the OCRAM. */
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#define CONFIG_SYS_TEXT_BASE 0x3f408000
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#define CONFIG_BOARD_SIZE_LIMIT 524288
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#define SD_BOOTCMD \
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"sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
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"sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \
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"${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
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"load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \
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"load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \
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"bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
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#define NFS_BOOTCMD \
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"nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
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"nfsboot=run setup; " \
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"setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
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"${setupargs} ${vidargs}; echo Booting from NFS...;" \
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"dhcp ${kernel_addr_r} && " \
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"tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
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"bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
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#define UBI_BOOTCMD \
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"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
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"ubi.fm_autoconvert=1\0" \
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"ubiboot=run setup; " \
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"setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
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"${setupargs} ${vidargs}; echo Booting from NAND...; " \
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"ubi part ubi && ubifsmount ubi0:rootfs && " \
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"ubifsload ${kernel_addr_r} /boot/${kernel_file} && " \
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"ubifsload ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \
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"bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
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#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
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#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel_addr_r=0x82000000\0" \
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"fdt_addr_r=0x84000000\0" \
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"kernel_file=zImage\0" \
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"fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \
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"fdt_board=eval-v3\0" \
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"defargs=\0" \
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"console=ttyLP0\0" \
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"setup=setenv setupargs " \
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"console=tty1 console=${console}" \
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",${baudrate}n8 ${memargs}\0" \
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"setsdupdate=mmc rescan && set interface mmc && " \
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"fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
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"source ${loadaddr}\0" \
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"setusbupdate=usb start && set interface usb && " \
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"fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
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"source ${loadaddr}\0" \
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"setupdate=run setsdupdate || run setusbupdate\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
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SD_BOOTCMD \
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NFS_BOOTCMD \
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UBI_BOOTCMD
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#undef CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START 0x80010000
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#define CONFIG_SYS_MEMTEST_END 0x87C00000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_CMDLINE_EDITING
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/*
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* Stack sizes
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
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/* Physical memory map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM (0x80000000)
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#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* Environment organization */
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#define CONFIG_SYS_NO_FLASH
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#ifdef CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
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#define CONFIG_ENV_SIZE (8 * 1024)
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#endif
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#ifdef CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_SIZE (64 * 2048)
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#define CONFIG_ENV_RANGE (4 * 64 * 2048)
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#define CONFIG_ENV_OFFSET (12 * 64 * 2048)
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#endif
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#define CONFIG_SYS_NO_FLASH
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/* USB Host Support */
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_VF
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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/* USB Client Support */
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#define CONFIG_TRDX_VID 0x1B67
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#define CONFIG_TRDX_PID_COLIBRI_VF50 0x0016
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#define CONFIG_TRDX_PID_COLIBRI_VF61 0x0017
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#define CONFIG_TRDX_PID_COLIBRI_VF61IT 0x0018
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#define CONFIG_TRDX_PID_COLIBRI_VF50IT 0x0019
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/* USB DFU */
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#define CONFIG_USB_FUNCTION_DFU
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#define CONFIG_DFU_NAND
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#define CONFIG_DFU_MMC
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024)
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/* USB Storage */
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#endif /* __CONFIG_H */
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