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https://github.com/brain-hackers/u-boot-brain
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![Luka Kovacic](/assets/img/avatar_default.png)
CRS305-1G-4S has a switch chip with an integrated CPU (98DX3236) and like some of the other similar boards requires bin_hdr. bin_hdr (DDR3 init stage) is currently retrieved from the stock bootloader and compiled into the kwb image. Adds support for U-Boot, enable UART, SPI, Winbond SPI flash chip support and writing env to SPI flash. Signed-off-by: Luka Kovacic <me@lukakovacic.xyz> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
111 lines
2.3 KiB
Plaintext
111 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for CRS305-1G-4S board
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*
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* Copyright (C) 2016 Allied Telesis Labs
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*
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* Based on armada-xp-db.dts
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*
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* Note: this Device Tree assumes that the bootloader has remapped the
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* internal registers to 0xf1000000 (instead of the default
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* 0xd0000000). The 0xf1000000 is the default used by the recent,
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* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
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* boards were delivered with an older version of the bootloader that
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* left internal registers mapped at 0xd0000000. If you are in this
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* situation, you should either update your bootloader (preferred
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* solution) or the below Device Tree should be adjusted.
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*/
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/dts-v1/;
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#include "armada-xp-98dx3236.dtsi"
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#include "armada-xp-crs305-1g-4s-u-boot.dtsi"
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/ {
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model = "CRS305-1G-4S";
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compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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aliases {
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spi0 = &spi0;
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};
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memory {
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device_type = "memory";
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reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
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};
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};
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&L2 {
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arm,parity-enable;
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marvell,ecc-enable;
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};
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&devbus_bootcs {
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status = "okay";
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/* Device Bus parameters are required */
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/* Read parameters */
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devbus,bus-width = <16>;
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devbus,turn-off-ps = <60000>;
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devbus,badr-skew-ps = <0>;
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devbus,acc-first-ps = <124000>;
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devbus,acc-next-ps = <248000>;
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devbus,rd-setup-ps = <0>;
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devbus,rd-hold-ps = <0>;
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/* Write parameters */
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devbus,sync-enable = <0>;
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devbus,wr-high-ps = <60000>;
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devbus,wr-low-ps = <60000>;
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devbus,ale-wr-ps = <60000>;
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <100000>;
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash", "jedec,spi-nor";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <108000000>;
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m25p,fast-read;
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partition@u-boot {
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reg = <0x00000000 0x00100000>;
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label = "u-boot";
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};
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partition@u-boot-env {
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reg = <0x00100000 0x00040000>;
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label = "u-boot-env";
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};
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partition@unused {
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reg = <0x00140000 0x00ec0000>;
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label = "unused";
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};
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};
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};
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