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https://github.com/brain-hackers/u-boot-brain
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![Scott McNutt](/assets/img/avatar_default.png)
-When booting from an epcs controller, the epcs bootrom may leave the slave select in an asserted state causing soft reset hang. This patch ensures slave select is negated at reset. Patch by Scott McNutt, 08 Jun 2006
194 lines
4.7 KiB
C
194 lines
4.7 KiB
C
/*
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* (C) Copyright 2003, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <devices.h>
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#include <watchdog.h>
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#include <net.h>
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#ifdef CONFIG_STATUS_LED
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#include <status_led.h>
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#endif
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#if defined(CFG_NIOS_EPCSBASE)
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#include <nios2-epcs.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* All attempts to come up with a "common" initialization sequence
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* that works for all boards and architectures failed: some of the
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* requirements are just _too_ different. To get rid of the resulting
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* mess of board dependend #ifdef'ed code we now make the whole
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* initialization sequence configurable to the user.
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*
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* The requirements for any new initalization function is simple: it
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* receives a pointer to the "global data" structure as it's only
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* argument, and returns an integer return code, where 0 means
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* "continue" and != 0 means "fatal error, hang the system".
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*/
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extern void malloc_bin_reloc (void);
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typedef int (init_fnc_t) (void);
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/*
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* Begin and End of memory area for malloc(), and current "brk"
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*/
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static ulong mem_malloc_start = 0;
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static ulong mem_malloc_end = 0;
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static ulong mem_malloc_brk = 0;
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/*
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* The Malloc area is immediately below the monitor copy in RAM
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*/
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static void mem_malloc_init (void)
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{
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mem_malloc_start = CFG_MALLOC_BASE;
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mem_malloc_end = mem_malloc_start + CFG_MALLOC_LEN;
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mem_malloc_brk = mem_malloc_start;
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memset ((void *) mem_malloc_start,
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0,
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mem_malloc_end - mem_malloc_start);
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}
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void *sbrk (ptrdiff_t increment)
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{
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ulong old = mem_malloc_brk;
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ulong new = old + increment;
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if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
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return (NULL);
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}
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mem_malloc_brk = new;
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return ((void *) old);
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}
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/************************************************************************
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* Initialization sequence *
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***********************************************************************/
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init_fnc_t *init_sequence[] = {
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#if defined(CONFIG_BOARD_EARLY_INIT_F)
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board_early_init_f, /* Call board-specific init code early.*/
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#endif
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#if defined(CFG_NIOS_EPCSBASE)
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epcs_reset,
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#endif
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env_init,
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serial_init,
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console_init_f,
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display_options,
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checkcpu,
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checkboard,
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NULL, /* Terminate this list */
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};
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/***********************************************************************/
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void board_init (void)
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{
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bd_t *bd;
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init_fnc_t **init_fnc_ptr;
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char *s, *e;
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int i;
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/* Pointer is writable since we allocated a register for it.
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* Nios treats CFG_GBL_DATA_OFFSET as an address.
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*/
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gd = (gd_t *)CFG_GBL_DATA_OFFSET;
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/* compiler optimization barrier needed for GCC >= 3.4 */
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__asm__ __volatile__("": : :"memory");
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memset( gd, 0, CFG_GBL_DATA_SIZE );
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gd->bd = (bd_t *)(gd+1); /* At end of global data */
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gd->baudrate = CONFIG_BAUDRATE;
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gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
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bd = gd->bd;
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bd->bi_memstart = CFG_SDRAM_BASE;
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bd->bi_memsize = CFG_SDRAM_SIZE;
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bd->bi_flashstart = CFG_FLASH_BASE;
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#if defined(CFG_SRAM_BASE) && defined(CFG_SRAM_SIZE)
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bd->bi_sramstart= CFG_SRAM_BASE;
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bd->bi_sramsize = CFG_SRAM_SIZE;
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#endif
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bd->bi_baudrate = CONFIG_BAUDRATE;
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for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
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WATCHDOG_RESET ();
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if ((*init_fnc_ptr) () != 0) {
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hang ();
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}
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}
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WATCHDOG_RESET ();
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bd->bi_flashsize = flash_init();
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WATCHDOG_RESET ();
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mem_malloc_init();
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malloc_bin_reloc();
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env_relocate();
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bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
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s = getenv ("ethaddr");
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for (i = 0; i < 6; ++i) {
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bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
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if (s) s = (*e) ? e + 1 : e;
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}
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WATCHDOG_RESET ();
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devices_init();
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jumptable_init();
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console_init_r();
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WATCHDOG_RESET ();
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interrupt_init ();
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#if defined(CONFIG_BOARD_LATE_INIT)
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board_late_init ();
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#endif
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/* main_loop */
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for (;;) {
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WATCHDOG_RESET ();
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main_loop ();
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}
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}
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/***********************************************************************/
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void hang (void)
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{
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disable_interrupts ();
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puts("### ERROR ### Please reset board ###\n");
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for (;;);
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}
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