mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-10 13:16:16 +09:00
c61177aa10
For the RK3368, we use a multi-stage boot-process consisting of the
following:
1. TPL: initalises DRAM, returns to boot-ROM (which then loads
the next stage and transfers control to it)
2. SPL: a full-features SPL stage including OF_CONTROL and FIT
image loading, which fetches the ATF, DTB and full U-Boot
and then transfers control to the ATF (using the BL31
parameter block to indicate the location of BL33/U-Boot)
3. ATF: sets up the secure world and exits to BL33 (i.e. a full
U-Boot) in the normal world
4. full U-Boot
TPL/SPL and the full U-Boot are built from this tree and need to
run from distinct text addresses and with distinct initial stack
pointer addresses.
This commit sets up the configuration to run:
- TPL from the SRAM at 0xff8c0000 (note that the first 0x1000
are reserved for use by the boot-ROM and contain the SP
when the TPL is entered)
- SPL from DRAM at 0x0
- U-Boot from DRAM at 0x200000
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
/*
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* Copyright (c) 2016 Andreas Färber
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RK3368_COMMON_H
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#define __CONFIG_RK3368_COMMON_H
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#define CONFIG_SYS_CACHELINE_SIZE 64
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#include <asm/arch/hardware.h>
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#include <linux/sizes.h>
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#define CONFIG_SYS_SDRAM_BASE 0
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#define SDRAM_MAX_SIZE 0xff000000
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define COUNTER_FREQUENCY 24000000
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_TEXT_BASE 0x00200000
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#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
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#define CONFIG_SYS_LOAD_ADDR 0x00280000
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#define CONFIG_SPL_TEXT_BASE 0x00000000
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#define CONFIG_SPL_MAX_SIZE 0x40000
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#define CONFIG_SPL_BSS_START_ADDR 0x400000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x20000
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#define CONFIG_TPL_LDSCRIPT \
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"arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
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#define CONFIG_TPL_TEXT_BASE 0xff8c1000
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#define CONFIG_TPL_MAX_SIZE 0x7000
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#define CONFIG_TPL_STACK 0xff8cffff
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#define CONFIG_BOUNCE_BUFFER
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#ifndef CONFIG_SPL_BUILD
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x00500000\0" \
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"pxefile_addr_r=0x00600000\0" \
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"fdt_addr_r=0x5600000\0" \
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"kernel_addr_r=0x280000\0" \
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"ramdisk_addr_r=0x5bf0000\0"
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#include <config_distro_defaults.h>
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#define BOOT_TARGET_DEVICES(func)
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV
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#endif
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#endif
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