mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-24 03:49:43 +09:00
7a8e9bed17
Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engström, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board
96 lines
2.3 KiB
Makefile
96 lines
2.3 KiB
Makefile
#
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# (C) Copyright 2000
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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LOAD_ADDR = 0x40000
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include $(TOPDIR)/config.mk
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SREC = hello_world.srec
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BIN = hello_world.bin
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ifeq ($(ARCH),i386)
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SREC += 82559_eeprom.srec
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BIN += 82559_eeprom.bin
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endif
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ifeq ($(ARCH),ppc)
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SREC += sched.srec
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BIN += sched.bin
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endif
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ifeq ($(ARCH),mips)
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SREC =
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BIN =
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endif
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# The following example is pretty 8xx specific...
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ifeq ($(CPU),mpc8xx)
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SREC += timer.srec
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BIN += timer.bin
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endif
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# The following example is 8260 specific...
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ifeq ($(CPU),mpc8260)
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SREC += mem_to_mem_idma2intr.srec
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BIN += mem_to_mem_idma2intr.bin
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endif
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# Utility for resetting i82559 EEPROM
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ifeq ($(BOARD),oxc)
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SREC += eepro100_eeprom.srec
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endif
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OBJS = $(SREC:.srec=.o)
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LIB = libsyscall.a
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LIBAOBJS= syscall.o
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ifeq ($(ARCH),ppc)
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LIBAOBJS+= $(ARCH)_longjmp.o $(ARCH)_setjmp.o
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endif
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LIBCOBJS=
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LIBOBJS = $(LIBAOBJS) $(LIBCOBJS)
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CPPFLAGS += -I..
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all: .depend $(LIB) $(SREC) $(BIN)
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#########################################################################
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$(LIB): .depend $(LIBOBJS)
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$(AR) crv $@ $(LIBOBJS)
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%.srec: %.o $(LIB)
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$(LD) -g -Ttext $(LOAD_ADDR) -o $(<:.o=) -e $(<:.o=) $< $(LIB)
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$(OBJCOPY) -O srec $(<:.o=) $@
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%.bin: %.srec
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$(OBJCOPY) -O binary $< $@ 2>/dev/null
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#########################################################################
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.depend: Makefile $(OBJS:.o=.c) $(LIBCOBJS:.o=.c) $(LIBAOBJS:.o=.S)
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$(CC) -M $(CFLAGS) $(OBJS:.o=.c) $(LIBCOBJS:.o=.c) $(LIBAOBJS:.o=.S) > $@
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sinclude .depend
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#########################################################################
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