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u-boot-brain/board/terasic/sockit/qts
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Chin Liang See bdef7876ad arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1 
Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27 08:03:12 +02:00
..
iocsr_config.h arm: socfpga: sockit: Use more relaxed DRAM timings 2016-04-10 17:19:48 +02:00
pinmux_config.h arm: socfpga: Add support for Terasic SoCkit board 2015-09-04 11:54:21 +02:00
pll_config.h arm: socfpga: sockit: Use more relaxed DRAM timings 2016-04-10 17:19:48 +02:00
sdram_config.h arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1 2016-10-27 08:03:12 +02:00