Simon Glass 90b16d1491 x86: chromebook_link: dts: Add PCH and LPC devices ... The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org>		2015-04-18 11:11:15 -06:00
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cpu	x86: chromebook_link: dts: Add PCH and LPC devices	2015-04-18 11:11:15 -06:00
dts	x86: chromebook_link: dts: Add PCH and LPC devices	2015-04-18 11:11:15 -06:00
include/asm	dm: x86: spi: Convert ICH SPI driver to driver model	2015-04-18 11:11:14 -06:00
lib	dm: x86: Add a uclass for an Low Pin Count (LPC) device	2015-04-18 11:11:14 -06:00
config.mk	generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig	2015-03-28 09:03:08 -04:00
Kconfig	dm: x86: spi: Convert ICH SPI driver to driver model	2015-04-18 11:11:14 -06:00
Makefile	Kbuild: introduce Makefile in arch/$ARCH/	2014-12-08 09:35:45 -05:00