John Keeping c482c60a14 rockchip: sdram: Fix register layout for Linux ... The ChromeOS kernel reads the RAM settings from PMU_SYS_REG2 and expects the bootloader to store the necessary information there. We're using the same register to pass the same information between the SPL and U-Boot but in a slightly different format. Change this to use the format expected by the Linux DMC driver so that the system doesn't hang in Linux by misconfiguring the RAM. This is almost the same as commit b5788dc ("rockchip: rk3288: correct sdram setting") which was reverted in commit b525556 ("Revert "rockchip: rk3288: correct sdram setting"") but parenthese have been added to apply the mask correctly when reading the "bw" setting and a couple of minor style issues have been fixed to keep check_patch.pl happy. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>		2016-07-25 20:46:46 -06:00
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clk_rk3288.c	rockchip: Add a way to obtain the main clock device	2016-07-25 20:46:45 -06:00
Kconfig	rockchip: add basic support for evb-rk3288 board	2016-07-25 20:44:18 -06:00
Makefile	rockchip: Add a way to obtain the main clock device	2016-07-25 20:46:45 -06:00
reset_rk3288.c	Rename reset to sysreset	2016-05-26 20:48:31 -06:00
sdram_rk3288.c	rockchip: sdram: Fix register layout for Linux	2016-07-25 20:46:46 -06:00
syscon_rk3288.c	rockchip: syscon: Update to work with of-platdata	2016-07-14 20:40:24 -06:00