mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
57 lines
1.5 KiB
C
57 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2011
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* Texas Instruments, <www.ti.com>
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*
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* Author :
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* Tom Rini <trini@ti.com>
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*
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* Initial Code from:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Jian Zhang <jzhang@ti.com>
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*/
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#include <common.h>
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#include <jffs2/load_kernel.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/omap_gpmc.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mem.h>
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/*
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* Many boards will want to know the results of the NAND_CMD_READID command
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* in order to decide what to do about DDR initialization. This function
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* allows us to do that very early and to pass those results back to the
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* board so it can make whatever decisions need to be made.
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*/
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int identify_nand_chip(int *mfr, int *id)
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{
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int loops = 1000;
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/* Make sure that we have setup GPMC for NAND correctly. */
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set_gpmc_cs0(MTD_DEV_TYPE_NAND);
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sdelay(2000);
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/* Issue a RESET and then READID */
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writeb(NAND_CMD_RESET, &gpmc_cfg->cs[0].nand_cmd);
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writeb(NAND_CMD_STATUS, &gpmc_cfg->cs[0].nand_cmd);
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while ((readl(&gpmc_cfg->cs[0].nand_dat) & NAND_STATUS_READY)
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!= NAND_STATUS_READY) {
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sdelay(100);
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if (--loops == 0)
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return 1;
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}
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writeb(NAND_CMD_READID, &gpmc_cfg->cs[0].nand_cmd);
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/* Set the address to read to 0x0 */
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writeb(0x0, &gpmc_cfg->cs[0].nand_adr);
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/* Read off the manufacturer and device id. */
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*mfr = readb(&gpmc_cfg->cs[0].nand_dat);
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*id = readb(&gpmc_cfg->cs[0].nand_dat);
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return 0;
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}
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