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https://github.com/brain-hackers/u-boot-brain
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3940a47155
According to the devicetree and the schematic, the 3.3V power rail for the PHY is enabled by GPIO PC16. It's wired as active-high, with a pull-up resistor, so actually works already when the GPIO is in High-Z state. However we should not take any chances and explicitly set the GPIO pin to high, to avoid accidentally losing the PHY power. The existing MACPWR Kconfig allows to do this easily. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+ Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
17 lines
414 B
Plaintext
17 lines
414 B
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_SPL=y
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CONFIG_MACH_SUN50I_H6=y
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CONFIG_SUNXI_DRAM_H6_LPDDR3=y
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CONFIG_MMC0_CD_PIN="PF6"
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_USB3_VBUS_PIN="PL5"
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CONFIG_SPL_SPI_SUNXI=y
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# CONFIG_PSCI_RESET is not set
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CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64"
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SUN8I_EMAC=y
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CONFIG_MACPWR="PC16"
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_OHCI_HCD=y
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