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https://github.com/brain-hackers/u-boot-brain
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84b124db35
The cache UCLASS will be used for configure settings that can be found in a CPU's L2 cache controller. Add a uclass and a test for cache. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
35 lines
651 B
C
35 lines
651 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 Intel Corporation <www.intel.com>
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*/
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#include <common.h>
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#include <cache.h>
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#include <dm.h>
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#include <errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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static int sandbox_get_info(struct udevice *dev, struct cache_info *info)
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{
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info->base = 0x11223344;
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return 0;
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}
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static const struct cache_ops sandbox_cache_ops = {
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.get_info = sandbox_get_info,
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};
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static const struct udevice_id sandbox_cache_ids[] = {
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{ .compatible = "sandbox,cache" },
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{ }
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};
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U_BOOT_DRIVER(cache_sandbox) = {
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.name = "cache_sandbox",
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.id = UCLASS_CACHE,
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.of_match = sandbox_cache_ids,
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.ops = &sandbox_cache_ops,
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};
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