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![Horatiu Vultur](/assets/img/avatar_default.png)
Add ethernet nodes for ServalT SoCs family. Currently there is only one pcb(pcb116) in this family. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
190 lines
3.9 KiB
Plaintext
190 lines
3.9 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2018 Microsemi Corporation
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*/
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mscc,servalt";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "mips,mips24KEc";
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device_type = "cpu";
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clocks = <&cpu_clk>;
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reg = <0>;
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};
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};
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aliases {
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serial0 = &uart0;
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};
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cpuintc: interrupt-controller@0 {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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cpu_clk: cpu-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <500000000>;
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};
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sys_clk: sys-clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <250000000>;
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};
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ahb_clk: ahb-clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <250000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x70000000 0x2000000>;
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interrupt-parent = <&intc>;
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cpu_ctrl: syscon@0 {
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compatible = "mscc,servalt-cpu-syscon", "syscon";
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reg = <0x0 0x2c>;
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};
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intc: interrupt-controller@70 {
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compatible = "mscc,servalt-icpu-intr";
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reg = <0x70 0x74>;
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#interrupt-cells = <1>;
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interrupt-controller;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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uart0: serial@100000 {
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pinctrl-0 = <&uart_pins>;
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pinctrl-names = "default";
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compatible = "ns16550a";
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reg = <0x100000 0x20>;
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interrupts = <6>;
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clocks = <&ahb_clk>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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};
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uart2: serial@100800 {
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pinctrl-0 = <&uart2_pins>;
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pinctrl-names = "default";
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compatible = "ns16550a";
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reg = <0x100800 0x20>;
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interrupts = <7>;
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clocks = <&ahb_clk>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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};
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reset@1010008 {
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compatible = "mscc,servalt-chip-reset";
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reg = <0x1010008 0x4>;
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};
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gpio: pinctrl@1010034 {
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compatible = "mscc,servalt-pinctrl";
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reg = <0x1010034 0x90>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&gpio 0 0 36>;
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sgpio_pins: sgpio-pins {
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pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3";
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function = "sio";
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};
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uart_pins: uart-pins {
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pins = "GPIO_6", "GPIO_7";
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function = "uart";
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};
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uart2_pins: uart2-pins {
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pins = "GPIO_20", "GPIO_21";
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function = "uart2";
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};
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};
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spi0: spi-bitbang {
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compatible = "mscc,luton-bb-spi";
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status = "okay";
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reg = <0x50 0x4>;
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num-chipselects = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sgpio: gpio@1010120 {
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compatible = "mscc,ocelot-sgpio";
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status = "disabled";
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clocks = <&sys_clk>;
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pinctrl-0 = <&sgpio_pins>;
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pinctrl-names = "default";
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reg = <0x1010120 0x100>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&sgpio 0 0 128>;
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};
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switch: switch@1010000 {
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compatible = "mscc,vsc7437-switch";
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reg = <0x01030000 0x0100>, // VTSS_TO_DEV_0
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<0x01040000 0x0100>, // VTSS_TO_DEV_1
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<0x01f00000 0x100000>, // ANA_AC
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<0x01d00000 0x100000>, // ANA_CL
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<0x01e00000 0x100000>, // ANA_L2
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<0x01120000 0x10000>, // ASM
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<0x01130000 0x00000>, // LRN
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<0x017d0000 0x10000>, // QFWD
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<0x01020000 0x20000>, // QS
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<0x017e0000 0x10000>, // QSYS
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<0x01b00000 0x80000>; // REW
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reg-names = "port0", "port1",
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"ana_ac", "ana_cl", "ana_l2", "asm", "lrn",
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"qfwd", "qs", "qsys", "rew";
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status = "okay";
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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mdio0: mdio@010100c4 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "mscc,jr2-miim";
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reg = <0x010100c4 0x24>;
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status = "disabled";
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};
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mdio1: mdio@010100e8 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "mscc,jr2-miim";
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reg = <0x010100e8 0x24>;
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status = "disabled";
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};
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};
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};
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