mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-14 22:23:56 +09:00
c28a9cfa40
Optionally allow U-Boot to load a configuration object into the Power Management Unit (PMU) firmware on Xilinx ZynqMP. The configuration object is required by the PMU FW to enable most SoC peripherals. So far the only way to boot using U-Boot SPL was to hard-code the configuration object in the PMU firmware. Allow a different boot process, where the PMU FW is equal for any ZynqMP chip and its configuration is passed at runtime by U-Boot SPL. All the code for Inter-processor communication with the PMU is isolated in a new file (pmu_ipc.c). The code is inspired by the same feature as implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted Firmware: *fb647e6b4c/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c (L295)*c48d02bade/plat/xilinx/zynqmp/pm_service/pm_api_sys.c (L357)SPL logs on the console before loading the configuration object: U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200) Loading PMUFW cfg obj (2008 bytes) EL Level: EL3 ... Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
78 lines
1.8 KiB
C
78 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* (C) Copyright 2014 - 2015 Xilinx, Inc.
|
|
* Michal Simek <michal.simek@xilinx.com>
|
|
*/
|
|
|
|
#ifndef _ASM_ARCH_SYS_PROTO_H
|
|
#define _ASM_ARCH_SYS_PROTO_H
|
|
|
|
#define PAYLOAD_ARG_CNT 5
|
|
|
|
#define ZYNQMP_CSU_SILICON_VER_MASK 0xF
|
|
#define ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD 0xC200002D
|
|
#define KEY_PTR_LEN 32
|
|
|
|
#define ZYNQMP_FPGA_BIT_AUTH_DDR 1
|
|
#define ZYNQMP_FPGA_BIT_AUTH_OCM 2
|
|
#define ZYNQMP_FPGA_BIT_ENC_USR_KEY 3
|
|
#define ZYNQMP_FPGA_BIT_ENC_DEV_KEY 4
|
|
#define ZYNQMP_FPGA_BIT_NS 5
|
|
|
|
#define ZYNQMP_FPGA_AUTH_DDR 1
|
|
|
|
#define ZYNQMP_SIP_SVC_GET_API_VERSION 0xC2000001
|
|
|
|
#define ZYNQMP_PM_VERSION_MAJOR 1
|
|
#define ZYNQMP_PM_VERSION_MINOR 0
|
|
#define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16
|
|
#define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF
|
|
|
|
#define ZYNQMP_PM_VERSION \
|
|
((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \
|
|
ZYNQMP_PM_VERSION_MINOR)
|
|
|
|
#define ZYNQMP_PM_VERSION_INVALID ~0
|
|
|
|
#define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
|
|
|
|
enum {
|
|
IDCODE,
|
|
VERSION,
|
|
IDCODE2,
|
|
};
|
|
|
|
enum {
|
|
ZYNQMP_SILICON_V1,
|
|
ZYNQMP_SILICON_V2,
|
|
ZYNQMP_SILICON_V3,
|
|
ZYNQMP_SILICON_V4,
|
|
};
|
|
|
|
enum {
|
|
TCM_LOCK,
|
|
TCM_SPLIT,
|
|
};
|
|
|
|
int zynq_board_read_rom_ethaddr(unsigned char *ethaddr);
|
|
unsigned int zynqmp_get_silicon_version(void);
|
|
|
|
void handoff_setup(void);
|
|
|
|
unsigned int zynqmp_pmufw_version(void);
|
|
int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value);
|
|
int zynqmp_mmio_read(const u32 address, u32 *value);
|
|
int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3,
|
|
u32 *ret_payload);
|
|
|
|
void initialize_tcm(bool mode);
|
|
void mem_map_fill(void);
|
|
int chip_id(unsigned char id);
|
|
#if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU) || defined(CONFIG_DEFINE_TCM_OCM_MMAP)
|
|
void tcm_init(u8 mode);
|
|
#endif
|
|
|
|
void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size);
|
|
|
|
#endif /* _ASM_ARCH_SYS_PROTO_H */
|