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https://github.com/brain-hackers/u-boot-brain
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1d43e24b94
Writing/updating boot image in nand device is not straight forward in i.MX6 platform and it requires boot control block(BCB) to be configured. It becomes difficult to use uboot 'nand' command to write BCB since it requires platform specific attributes need to be taken care of. It is even difficult to use existing msx-nand.c driver by incorporating BCB attributes like mxs_dma_desc does because it requires change in mtd and nand command. So, cmd_nandbcb implemented in arch/arm/mach-imx BCB contains two data structures, Firmware Configuration Block(FCB) and Discovered Bad Block Table(DBBT). FCB has nand timings, DBBT search area, page address of firmware. On summary, nandbcb update will - erase the entire partition - create BCB by creating 2 FCB/DBBT block followed by 1 FW block based on partition size and erasesize. - fill FCB/DBBT structures - write FW/SPL on FW1 - write FCB/DBBT in first 2 blocks for nand boot, up on reset bootrom look for FCB structure in first block's if FCB found the nand timings are loaded for further reads. once FCB read done, DTTB will load and finally firmware will be loaded which is boot image. Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage information. Reviewed-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Sergey Kubushyn <ksi@koi8.net> Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
104 lines
3.0 KiB
Plaintext
104 lines
3.0 KiB
Plaintext
config HAS_CAAM
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bool
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config IMX_CONFIG
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string
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config ROM_UNIFIED_SECTIONS
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bool
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config SYSCOUNTER_TIMER
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bool
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config GPT_TIMER
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bool
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config IMX_RDC
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bool "i.MX Resource domain controller driver"
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depends on ARCH_MX6 || ARCH_MX7
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help
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i.MX Resource domain controller is used to assign masters
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and peripherals to differet domains. This can be used to
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isolate resources.
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config IMX_BOOTAUX
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bool "Support boot auxiliary core"
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depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610
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help
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bootaux [addr] to boot auxiliary core.
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config USE_IMXIMG_PLUGIN
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bool "Use imximage plugin code"
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depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX7ULP
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help
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i.MX6/7 supports DCD and Plugin. Enable this configuration
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to use Plugin, otherwise DCD will be used.
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config SECURE_BOOT
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bool "Support i.MX HAB features"
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depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5
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select FSL_CAAM if HAS_CAAM
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imply CMD_DEKBLOB
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help
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This option enables the support for secure boot (HAB).
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See doc/README.mxc_hab for more details.
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config CMD_BMODE
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bool "Support the 'bmode' command"
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default y
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depends on ARCH_MX6 || ARCH_MX5
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help
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This enables the 'bmode' (bootmode) command for forcing
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a boot from specific media.
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This is useful for forcing the ROM's usb downloader to
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activate upon a watchdog reset which is nice when iterating
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on U-Boot. Using the reset button or running bmode normal
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will set it back to normal. This command currently
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supports i.MX53 and i.MX6.
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config CMD_DEKBLOB
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bool "Support the 'dek_blob' command"
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help
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This enables the 'dek_blob' command which is used with the
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Freescale secure boot mechanism. This command encapsulates and
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creates a blob of data. See also CMD_BLOB and doc/README.mxc_hab for
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more information.
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config CMD_HDMIDETECT
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bool "Support the 'hdmidet' command"
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help
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This enables the 'hdmidet' command which detects if an HDMI monitor
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is connected.
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config CMD_NANDBCB
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bool "i.MX6 NAND Boot Control Block(BCB) command"
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depends on NAND && CMD_MTDPARTS
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default y if ARCH_MX6 && NAND_MXS
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help
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Unlike normal 'nand write/erase' commands, this command update
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Boot Control Block(BCB) for i.MX6 platform NAND IP's.
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This is similar to kobs-ng, which is used in Linux as separate
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rootfs package.
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config NXP_BOARD_REVISION
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bool "Read NXP board revision from fuses"
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depends on ARCH_MX6 || ARCH_MX7
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help
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NXP boards based on i.MX6/7 contain the board revision information
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stored in the fuses. Select this option if you want to be able to
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retrieve the board revision information.
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config DDRMC_VF610_CALIBRATION
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bool "Enable DDRMC (DDR3) on-chip calibration"
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depends on ARCH_VF610
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help
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Vybrid (vf610) SoC provides some on-chip facility to tune the DDR3
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memory parameters. Select this option if you want to calculate them
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at boot time.
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NOTE:
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NXP does NOT recommend to perform this calibration at each boot. One
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shall perform it on a new PCB and then use those values to program
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the ddrmc_cr_setting on relevant board file.
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