mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 04:36:16 +09:00
a0aba8a2eb
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
parameters; only for the ARC architecture. This patch turns these two
parameters into Kconfig items everywhere else they are found.
All of the include/configs/* and defconfig changes in this patch are
for arm machines only. The Kconfig changes for arc, nds32, riscv,
and xtensa have been included since these symbols are found in code
under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
include/configs/* or defconfigs for these architectures exist which
include these symbols.
These results have been confirmed with tools/moveconfig.py.
Acked-by: Alexey Brodkin <abrodkin@snopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Re-migrate for a few more boards]
Signed-off-by: Tom Rini <trini@konsulko.com>
192 lines
4.3 KiB
C
192 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Embest/Timll DevKit3250 board configuration file
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*
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* Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
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*/
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#ifndef __CONFIG_DEVKIT3250_H__
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#define __CONFIG_DEVKIT3250_H__
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/* SoC and board defines */
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#include <linux/sizes.h>
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#include <asm/arch/cpu.h>
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#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT3250
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#if !defined(CONFIG_SPL_BUILD)
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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/*
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* Memory configurations
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*/
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#define CONFIG_SYS_MALLOC_LEN SZ_1M
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#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
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#define CONFIG_SYS_SDRAM_SIZE SZ_64M
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#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \
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- GENERATED_GBL_DATA_SIZE)
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/*
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* Serial Driver
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*/
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#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 */
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/*
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* DMA
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*/
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#if !defined(CONFIG_SPL_BUILD)
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#define CONFIG_DMA_LPC32XX
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#endif
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/*
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* I2C
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_LPC32XX
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#define CONFIG_SYS_I2C_SPEED 100000
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/*
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* GPIO
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*/
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#define CONFIG_LPC32XX_GPIO
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/*
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* SSP/SPI
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*/
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#define CONFIG_LPC32XX_SSP_TIMEOUT 100000
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/*
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* Ethernet
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*/
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#define CONFIG_RMII
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#define CONFIG_PHY_SMSC
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#define CONFIG_LPC32XX_ETH
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#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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/*
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* NOR Flash
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 71
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#define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE
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#define CONFIG_SYS_FLASH_SIZE SZ_4M
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/*
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* NAND controller
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*/
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#define CONFIG_SYS_NAND_BASE SLC_NAND_BASE
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
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/*
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* NAND chip timings
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*/
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#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14
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#define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666
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#define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000
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#define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000
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#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 14
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#define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666
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#define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000
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#define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000
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#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
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#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/*
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* USB
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*/
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#define CONFIG_USB_OHCI_LPC32XX
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#define CONFIG_USB_ISP1301_I2C_ADDR 0x2d
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/*
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* U-Boot General Configurations
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*/
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*
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* Pass open firmware flat tree
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*/
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/*
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* Environment
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*/
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#define CONFIG_ENV_SIZE SZ_128K
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#define CONFIG_ENV_OFFSET 0x000A0000
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#define CONFIG_BOOTCOMMAND \
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"dhcp; " \
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"tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; " \
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"tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; " \
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"setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; " \
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"setenv bootargs ${bootargs} ${nfsargs} ${userargs}; " \
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"bootm ${loadaddr} - ${dtbaddr}"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"autoload=no\0" \
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"ethaddr=00:01:90:00:C0:81\0" \
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"dtbaddr=0x81000000\0" \
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"nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \
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"tftpdir=vladimir/oe/devkit3250\0" \
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"userargs=oops=panic\0"
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/*
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* U-Boot Commands
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*/
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/*
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* Boot Linux
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*/
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTFILE "uImage"
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#define CONFIG_LOADADDR 0x80008000
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/*
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* SPL specific defines
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*/
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/* SPL will be executed at offset 0 */
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/* SPL will use SRAM as stack */
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#define CONFIG_SPL_STACK 0x0000FFF8
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/* Use the framework and generic lib */
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/* SPL will use serial */
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/* SPL loads an image from NAND */
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#define CONFIG_SPL_NAND_RAW_ONLY
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SPL_NAND_SOFTECC
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#define CONFIG_SPL_MAX_SIZE 0x20000
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#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
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/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
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/* See common/spl/spl.c spl_set_header_raw_uboot() */
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#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE
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/*
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* Include SoC specific configuration
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*/
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#include <asm/arch/config.h>
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#endif /* __CONFIG_DEVKIT3250_H__*/
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