u-boot-brain/arch/arm/dts/socfpga_cyclone5.dtsi
Marek Vasut c2624240dd arm: socfpga: Do not enable gmac1 in Cyclone V dtsi
The GMAC which is enabled is purely board property, so do not enable
arbitrary GMAC in DT include files. Same goes for PHY mode, which is
again a board property. The CycloneV SoCDK does this correctly, but
SoCrates doesn't. This bug never manifested itself though, since all
the boards ever used the GMAC1 . This bug manifests itself only on
boards that utilise GMAC0.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-23 11:56:19 +02:00

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/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
/* First 4KB has trampoline code for secondary cores. */
/memreserve/ 0x00000000 0x0001000;
#include "socfpga.dtsi"
/ {
soc {
clkmgr@ffd04000 {
clocks {
osc1 {
clock-frequency = <25000000>;
};
};
};
mmc0: dwmmc0@ff704000 {
num-slots = <1>;
broken-cd;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
};
sysmgr@ffd08000 {
cpu1-start-addr = <0xffd080c4>;
};
};
};