mirror of
https://github.com/brain-hackers/u-boot-brain
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682e09ff9f
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
22 lines
578 B
C
22 lines
578 B
C
/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef MACH_PLL_H
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#define MACH_PLL_H
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#define UNIPHIER_PLL_FREQ_DEFAULT (0)
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void uniphier_ld4_dpll_ssc_en(void);
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int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,
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unsigned int ssc_rate, unsigned int divn);
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int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base);
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int uniphier_ld20_vpll27_init(unsigned long reg_base);
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int uniphier_ld20_dspll_init(unsigned long reg_base);
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#endif /* MACH_PLL_H */
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