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https://github.com/brain-hackers/u-boot-brain
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c1c597e8a8
IFC-NOR and QSPI-NOR pins are multiplexed on SoC, so they cannot be accessed simultaneously. IFC-NOR can be accessed along with SD-BOOT. Ls1088aqds_sdcard_ifc_defconfig is default config for SD boot and IFC-NOR to be used as flash. This allows writing to IFC-NOR flash. QSPI and DSPI cannot be accessed in this defconfig. IFC-NOR image is generated using ls1088aqds_defconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
108 lines
1.9 KiB
Plaintext
108 lines
1.9 KiB
Plaintext
/*
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* NXP ls1088a QDS board device tree source
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*
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* Copyright 2017 NXP
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/dts-v1/;
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#include "fsl-ls1088a.dtsi"
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/ {
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model = "NXP Layerscape 1088a QDS Board";
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compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
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aliases {
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spi0 = &qspi;
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spi1 = &dspi;
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};
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};
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&ifc {
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#address-cells = <2>;
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#size-cells = <1>;
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/* NOR, NAND Flashes and FPGA on board */
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ranges = <0 0 0x5 0x80000000 0x08000000
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2 0 0x5 0x30000000 0x00010000
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3 0 0x5 0x20000000 0x00010000>;
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status = "okay";
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x8000000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nand@2,0 {
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compatible = "fsl,ifc-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x1 0x0 0x10000>;
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};
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fpga: board-control@3,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus", "fsl,ls1088aqds-fpga",
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"fsl,fpga-qixis";
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reg = <0x2 0x0 0x0000100>;
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bank-width = <1>;
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device-width = <1>;
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ranges = <0 2 0 0x100>;
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};
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};
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&dspi {
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bus-num = <0>;
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status = "okay";
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dflash0: n25q128a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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reg = <0>;
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spi-max-frequency = <1000000>; /* input clock */
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};
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dflash1: sst25wf040b {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3500000>;
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reg = <1>;
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};
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dflash2: en25s64 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3500000>;
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reg = <2>;
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};
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};
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&qspi {
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bus-num = <0>;
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status = "okay";
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qflash0: s25fs512s@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <50000000>;
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reg = <0>;
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};
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qflash1: s25fs512s@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <50000000>;
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reg = <1>;
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};
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};
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