u-boot-brain/arch/x86
Bin Meng 1e6ebee667 x86: fsp: Configure SPI opcode registers before SPI is locked down
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.

This introduces a Kconfig option CONFIG_FSP_LOCKDOWN_SPI for such
FSPs. When it is on, U-Boot will configure the SPI opcode registers
before the lock-down.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-24 11:00:47 +08:00
..
cpu env: Convert CONFIG_ENV_IS_IN... to a choice 2017-08-15 20:50:01 -04:00
dts x86: conga-qeval20-qa3-e3845.dts: Enable xHCI support in dts 2017-07-30 10:30:25 +08:00
include/asm x86: Remove dead ISA related codes 2017-08-08 16:46:32 +08:00
lib x86: fsp: Configure SPI opcode registers before SPI is locked down 2017-08-24 11:00:47 +08:00
config.mk x86: Enforce toolchain to generate 64-bit codes for 64-bit U-Boot 2017-08-01 20:17:02 +08:00
Kconfig x86: fsp: Configure SPI opcode registers before SPI is locked down 2017-08-24 11:00:47 +08:00
Makefile x86: Add 64-bit start-up code 2017-02-06 11:38:46 +08:00