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![]() DDR has been set as secure in MMU tables. Non-secure master such as SDHC DMA cannot access data correctly. Mixing secure and non- secure MMU entries requirs the MMU tables themselves in secure memory. This patch moves MMU tables into a secure DDR area. Early MMU tables are changed to set DDR as non-secure. A new table is added into final MMU tables so secure memory can have 2MB granuality. gd->secure_ram tracks the location of this secure memory. For ARMv8 SoCs, the RAM base is not zero and RAM is divided into several banks. gd->secure_ram needs to be maintained before using. This maintenance is board-specific, depending on the SoC and memory bank of the secure memory falls into. Signed-off-by: York Sun <yorksun@freescale.com> |
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.. | ||
clock.h | ||
config.h | ||
cpu.h | ||
fdt.h | ||
fsl_serdes.h | ||
immap_lsch2.h | ||
immap_lsch3.h | ||
imx-regs.h | ||
ls2080a_stream_id.h | ||
mmu.h | ||
mp.h | ||
ns_access.h | ||
soc.h | ||
speed.h |