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c107c0c05c
DDR has been set as secure in MMU tables. Non-secure master such as SDHC DMA cannot access data correctly. Mixing secure and non- secure MMU entries requirs the MMU tables themselves in secure memory. This patch moves MMU tables into a secure DDR area. Early MMU tables are changed to set DDR as non-secure. A new table is added into final MMU tables so secure memory can have 2MB granuality. gd->secure_ram tracks the location of this secure memory. For ARMv8 SoCs, the RAM base is not zero and RAM is divided into several banks. gd->secure_ram needs to be maintained before using. This maintenance is board-specific, depending on the SoC and memory bank of the secure memory falls into. Signed-off-by: York Sun <yorksun@freescale.com> |
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.. | ||
cpu | ||
dts | ||
imx-common | ||
include | ||
lib | ||
mach-at91 | ||
mach-bcm283x | ||
mach-davinci | ||
mach-exynos | ||
mach-highbank | ||
mach-integrator | ||
mach-keystone | ||
mach-kirkwood | ||
mach-mvebu | ||
mach-orion5x | ||
mach-rockchip | ||
mach-s5pc1xx | ||
mach-socfpga | ||
mach-tegra | ||
mach-uniphier | ||
mach-versatile | ||
mach-zynq | ||
mvebu-common | ||
thumb1/include/asm/proc-armv | ||
config.mk | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |