mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-26 20:09:02 +09:00
![Jagan Teki](/assets/img/avatar_default.png)
Devicetree files in RK3399 platform is synced from Linux, like other platforms does. Apart from these u-boot in rk3399 would also require some u-boot specific node like dmc. dmc node has big chunk of DDR timing parameters which are specific to specific board, and maintained with rk3399-sdram*.dtsi. So, create board specific -u-boot.dtsi files and move these sdram dtsi files accordingly. This would help of maintain u-boot specific changes separately without touching Linux dts(i) files which indeed easy for syncing from Linux between releases. These board specific -u-boot.dtsi can be extendible to add more u-boot specific nodes or properties in future. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
666 lines
14 KiB
Plaintext
666 lines
14 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "rk3399.dtsi"
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/ {
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model = "Firefly-RK3399 Board";
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compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
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chosen {
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stdout-path = &uart2;
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u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
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pwms = <&pwm0 0 25000 0>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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};
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clkin_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "clkin_gmac";
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#clock-cells = <0>;
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};
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rt5640-sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "rockchip,rt5640-codec";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,widgets =
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"Microphone", "Mic Jack",
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Mic Jack", "MICBIAS1",
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"IN1P", "Mic Jack",
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"Headphone Jack", "HPOL",
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"Headphone Jack", "HPOR";
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simple-audio-card,cpu {
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sound-dai = <&i2s1>;
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};
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simple-audio-card,codec {
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sound-dai = <&rt5640>;
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk808 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
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};
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vcc3v3_pcie: vcc3v3-pcie-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_drv>;
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regulator-name = "vcc3v3_pcie";
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regulator-always-on;
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regulator-boot-on;
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&host_vbus_drv>;
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regulator-name = "vcc5v0_host";
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regulator-always-on;
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};
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vcc5v0_sys: vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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vcc_phy: vcc-phy-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_phy";
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_log: vdd-log {
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compatible = "pwm-regulator";
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pwms = <&pwm2 0 25000 1>;
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regulator-name = "vdd_log";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <430000>;
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regulator-max-microvolt = <1400000>;
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regulator-init-microvolt = <950000>;
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};
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vccadc_ref: vccadc-ref {
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compatible = "regulator-fixed";
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regulator-name = "vcc1v8_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l1 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l2 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l3 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_b>;
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};
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&cpu_b1 {
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cpu-supply = <&vdd_cpu_b>;
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};
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&emmc_phy {
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status = "okay";
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};
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&gmac {
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assigned-clocks = <&cru SCLK_RMII_SRC>;
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assigned-clock-parents = <&clkin_gmac>;
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clock_in_out = "input";
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phy-supply = <&vcc_phy>;
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phy-mode = "rgmii";
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 50000>;
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tx_delay = <0x33>;
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rx_delay = <0x45>;
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <400000>;
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i2c-scl-rising-time-ns = <168>;
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i2c-scl-falling-time-ns = <4>;
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status = "okay";
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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reg = <0x1b>;
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interrupt-parent = <&gpio1>;
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interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <1>;
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clock-output-names = "xin32k", "rk808-clkout2";
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l>;
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rockchip,system-power-controller;
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wakeup-source;
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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vcc10-supply = <&vcc3v3_sys>;
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vcc11-supply = <&vcc3v3_sys>;
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vcc12-supply = <&vcc3v3_sys>;
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vddio-supply = <&vcc1v8_pmu>;
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regulators {
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vdd_center: DCDC_REG1 {
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regulator-name = "vdd_center";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_cpu_l: DCDC_REG2 {
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regulator-name = "vdd_cpu_l";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-name = "vcc_ddr";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc_1v8: DCDC_REG4 {
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc1v8_dvp: LDO_REG1 {
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regulator-name = "vcc1v8_dvp";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v0_tp: LDO_REG2 {
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regulator-name = "vcc3v0_tp";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc1v8_pmu: LDO_REG3 {
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regulator-name = "vcc1v8_pmu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc_sd: LDO_REG4 {
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regulator-name = "vcc_sd";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3000000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3000000>;
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};
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};
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vcca3v0_codec: LDO_REG5 {
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regulator-name = "vcca3v0_codec";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_1v5: LDO_REG6 {
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regulator-name = "vcc_1v5";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1500000>;
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};
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};
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vcca1v8_codec: LDO_REG7 {
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regulator-name = "vcca1v8_codec";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_3v0: LDO_REG8 {
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regulator-name = "vcc_3v0";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3000000>;
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};
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};
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vcc3v3_s3: SWITCH_REG1 {
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regulator-name = "vcc3v3_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc3v3_s0: SWITCH_REG2 {
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regulator-name = "vcc3v3_s0";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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};
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vdd_cpu_b: regulator@40 {
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compatible = "silergy,syr827";
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reg = <0x40>;
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fcs,suspend-voltage-selector = <0>;
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regulator-name = "vdd_cpu_b";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1500000>;
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regulator-ramp-delay = <1000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc5v0_sys>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: regulator@41 {
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compatible = "silergy,syr828";
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reg = <0x41>;
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fcs,suspend-voltage-selector = <1>;
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regulator-name = "vdd_gpu";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1500000>;
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regulator-ramp-delay = <1000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc5v0_sys>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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&i2c1 {
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i2c-scl-rising-time-ns = <300>;
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i2c-scl-falling-time-ns = <15>;
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status = "okay";
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rt5640: rt5640@1c {
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compatible = "realtek,rt5640";
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reg = <0x1c>;
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clocks = <&cru SCLK_I2S_8CH_OUT>;
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clock-names = "mclk";
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realtek,in1-differential;
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#sound-dai-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&rt5640_hpcon>;
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};
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};
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&i2c3 {
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i2c-scl-rising-time-ns = <450>;
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i2c-scl-falling-time-ns = <15>;
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status = "okay";
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};
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&i2c4 {
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i2c-scl-rising-time-ns = <600>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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accelerometer@68 {
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compatible = "invensense,mpu6500";
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reg = <0x68>;
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interrupt-parent = <&gpio1>;
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interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
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};
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};
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&i2s0 {
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rockchip,playback-channels = <8>;
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rockchip,capture-channels = <8>;
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&i2s1 {
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rockchip,playback-channels = <2>;
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rockchip,capture-channels = <2>;
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&i2s2 {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&io_domains {
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status = "okay";
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bt656-supply = <&vcc1v8_dvp>;
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audio-supply = <&vcca1v8_codec>;
|
|
sdmmc-supply = <&vcc_sd>;
|
|
gpio1830-supply = <&vcc_3v0>;
|
|
};
|
|
|
|
&pcie_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
|
|
num-lanes = <4>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie_clkreqn>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
pmu1830-supply = <&vcc_3v0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
buttons {
|
|
pwrbtn: pwrbtn {
|
|
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
lcd-panel {
|
|
lcd_panel_reset: lcd-panel-reset {
|
|
rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
pcie {
|
|
pcie_drv: pcie-drv {
|
|
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
pcie_3g_drv: pcie-3g-drv {
|
|
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
vsel1_gpio: vsel1-gpio {
|
|
rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
|
|
vsel2_gpio: vsel2-gpio {
|
|
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
sdio-pwrseq {
|
|
wifi_enable_h: wifi-enable-h {
|
|
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
rt5640 {
|
|
rt5640_hpcon: rt5640-hpcon {
|
|
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
pmic_int_l: pmic-int-l {
|
|
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
usb2 {
|
|
host_vbus_drv: host-vbus-drv {
|
|
rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&saradc {
|
|
vref-supply = <&vccadc_ref>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc {
|
|
bus-width = <4>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhci {
|
|
bus-width = <8>;
|
|
keep-power-in-suspend;
|
|
mmc-hs400-1_8v;
|
|
mmc-hs400-enhanced-strobe;
|
|
non-removable;
|
|
status = "okay";
|
|
};
|
|
|
|
&tsadc {
|
|
/* tshut mode 0:CRU 1:GPIO */
|
|
rockchip,hw-tshut-mode = <1>;
|
|
/* tshut polarity 0:LOW 1:HIGH */
|
|
rockchip,hw-tshut-polarity = <1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0 {
|
|
status = "okay";
|
|
|
|
u2phy0_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
|
|
u2phy0_host: host-port {
|
|
phy-supply = <&vcc5v0_host>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&u2phy1 {
|
|
status = "okay";
|
|
|
|
u2phy1_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
|
|
u2phy1_host: host-port {
|
|
phy-supply = <&vcc5v0_host>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ohci {
|
|
status = "okay";
|
|
};
|