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c061d5b3dd
Define minimum sdhci frequency for ep, as not defining it causes the divisor to be 2048 as per sd version but keeping clock very low on ep causes command failures. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
31 lines
809 B
C
31 lines
809 B
C
/*
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* Configuration for Xilinx ZynqMP emulation
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* platforms. See zynqmp-common.h for ZynqMP
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* common configs
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*
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* (C) Copyright 2014 - 2015 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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*
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* Based on Configuration for Versatile Express
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_ZYNQMP_EP_H
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#define __CONFIG_ZYNQMP_EP_H
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#define CONFIG_ZYNQ_SDHCI0
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#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
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#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9)
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#define CONFIG_ZYNQ_I2C0
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#define CONFIG_SYS_I2C_ZYNQ
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#define CONFIG_ZYNQ_EEPROM
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#define CONFIG_AHCI
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#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
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ZYNQMP_USB1_XHCI_BASEADDR}
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#include <configs/xilinx_zynqmp.h>
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#endif /* __CONFIG_ZYNQMP_EP_H */
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