mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-15 06:33:45 +09:00
![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
50 lines
1.4 KiB
C
50 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2009 Freescale Semiconductor, Inc.
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
|
|
#include "bcsr.h"
|
|
|
|
void enable_8569mds_flash_write(void)
|
|
{
|
|
setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP);
|
|
}
|
|
|
|
void disable_8569mds_flash_write(void)
|
|
{
|
|
clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP);
|
|
}
|
|
|
|
void enable_8569mds_qe_uec(void)
|
|
{
|
|
#if defined(CONFIG_SYS_UCC_RGMII_MODE)
|
|
setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7),
|
|
BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN);
|
|
setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8),
|
|
BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN);
|
|
setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9),
|
|
BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN);
|
|
setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10),
|
|
BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN);
|
|
#elif defined(CONFIG_SYS_UCC_RMII_MODE)
|
|
/* Set UCC1-4 working at RMII mode */
|
|
clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7),
|
|
BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN);
|
|
clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8),
|
|
BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN);
|
|
clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9),
|
|
BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN);
|
|
clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10),
|
|
BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN);
|
|
setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), BCSR9_UCC3_RMII_EN);
|
|
#endif
|
|
}
|
|
|
|
void disable_8569mds_brd_eeprom_write_protect(void)
|
|
{
|
|
clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), BCSR7_BRD_WRT_PROTECT);
|
|
}
|