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https://github.com/brain-hackers/u-boot-brain
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166fb46ad3
Removed no-1-8-v property from zynqmp sdhci devicetree nodes to allow UHS-I capable SD cards to work in SD3.0 UHS modes. Boards that does not have level shifter for SD, does not support 1.8v. so no-1-8-v property to sdhci dt nodes should be present in zcu102 Rev-A,B, zcu104 Rev-A,C, zcu100, zcu1275 Rev-B boards. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
85 lines
1.6 KiB
Plaintext
85 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* dts file for Xilinx ZynqMP ZCU1275 RevB
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*
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* (C) Copyright 2018, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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*/
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/dts-v1/;
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#include "zynqmp.dtsi"
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#include "zynqmp-clk-ccf.dtsi"
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/ {
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model = "ZynqMP ZCU1275 RevB";
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compatible = "xlnx,zynqmp-zcu1275-revB", "xlnx,zynqmp-zcu1275",
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"xlnx,zynqmp";
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aliases {
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serial0 = &uart0;
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serial1 = &dcc;
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spi0 = &qspi;
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mmc0 = &sdhci1;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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};
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&dcc {
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status = "okay";
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};
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&qspi {
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status = "okay";
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flash@0 {
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compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <1>;
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spi-max-frequency = <108000000>; /* Based on DC1 spec */
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partition@qspi-fsbl-uboot { /* for testing purpose */
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label = "qspi-fsbl-uboot";
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reg = <0x0 0x100000>;
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};
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partition@qspi-linux { /* for testing purpose */
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label = "qspi-linux";
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reg = <0x100000 0x500000>;
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};
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partition@qspi-device-tree { /* for testing purpose */
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label = "qspi-device-tree";
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reg = <0x600000 0x20000>;
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};
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partition@qspi-rootfs { /* for testing purpose */
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label = "qspi-rootfs";
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reg = <0x620000 0x5E0000>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&sdhci1 {
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status = "okay";
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/*
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* 1.0 revision has level shifter and this property should be
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* removed for supporting UHS mode
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*/
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no-1-8-v;
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xlnx,mio_bank = <1>;
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};
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