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![wdenk](/assets/img/avatar_default.png)
Add support for the Xilinx ML300 platform * Patch by Stephan Linz, 17 Feb 2004: Fix watchdog support for NIOS * Patch by Josh Fryman, 16 Feb 2004: Fix byte-swapping for cfi_flash.c for different bus widths * Patch by Jon Diekema, 14 Jeb 2004: Remove duplicate "FPGA Support" notes from the README file
449 lines
15 KiB
C
449 lines
15 KiB
C
/******************************************************************************
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*
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* Author: Xilinx, Inc.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*
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* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
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* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
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* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
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* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
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* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
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* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
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* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
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* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
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* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
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* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE.
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*
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*
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* Xilinx hardware products are not intended for use in life support
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* appliances, devices, or systems. Use in such applications is
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* expressly prohibited.
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*
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*
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* (c) Copyright 2002-2004 Xilinx Inc.
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* All rights reserved.
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*
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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******************************************************************************/
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/*****************************************************************************/
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/*
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*
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* @file xpacket_fifo_v1_00_b.c
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*
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* Contains functions for the XPacketFifoV100b component. See xpacket_fifo_v1_00_b.h
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* for more information about the component.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00b rpm 03/26/02 First release
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* </pre>
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*
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*****************************************************************************/
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/***************************** Include Files *********************************/
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#include "xbasic_types.h"
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#include "xio.h"
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#include "xstatus.h"
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#include "xpacket_fifo_v1_00_b.h"
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/************************** Constant Definitions *****************************/
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/* width of a FIFO word */
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#define XPF_FIFO_WIDTH_BYTE_COUNT 4UL
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************* Variable Definitions ******************************/
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/************************** Function Prototypes ******************************/
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/*****************************************************************************/
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/*
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*
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* This function initializes a packet FIFO. Initialization resets the
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* FIFO such that it's empty and ready to use.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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* @param RegBaseAddress contains the base address of the registers for
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* the packet FIFO.
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* @param DataBaseAddress contains the base address of the data for
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* the packet FIFO.
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*
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* @return
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*
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* Always returns XST_SUCCESS.
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*
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* @note
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*
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* None.
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*
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******************************************************************************/
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XStatus
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XPacketFifoV100b_Initialize(XPacketFifoV100b * InstancePtr,
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u32 RegBaseAddress, u32 DataBaseAddress)
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{
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/* assert to verify input argument are valid */
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XASSERT_NONVOID(InstancePtr != NULL);
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/* initialize the component variables to the specified state */
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InstancePtr->RegBaseAddress = RegBaseAddress;
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InstancePtr->DataBaseAddress = DataBaseAddress;
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InstancePtr->IsReady = XCOMPONENT_IS_READY;
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/* reset the FIFO such that it's empty and ready to use and indicate the
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* initialization was successful, note that the is ready variable must be
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* set prior to calling the reset function to prevent an assert
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*/
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XPF_V100B_RESET(InstancePtr);
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/*
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*
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* This function performs a self-test on the specified packet FIFO. The self
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* test resets the FIFO and reads a register to determine if it is the correct
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* reset value. This test is destructive in that any data in the FIFO will
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* be lost.
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*
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* @param InstancePtr is a pointer to the packet FIFO to be operated on.
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*
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* @param FifoType specifies the type of FIFO, read or write, for the self test.
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* The FIFO type is specified by the values XPF_READ_FIFO_TYPE or
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* XPF_WRITE_FIFO_TYPE.
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*
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* @return
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*
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* XST_SUCCESS is returned if the selftest is successful, or
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* XST_PFIFO_BAD_REG_VALUE indicating that the value readback from the
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* occupancy/vacancy count register after a reset does not match the
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* specified reset value.
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*
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* @note
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*
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* None.
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*
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******************************************************************************/
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XStatus
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XPacketFifoV100b_SelfTest(XPacketFifoV100b * InstancePtr, u32 FifoType)
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{
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u32 Register;
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/* assert to verify valid input arguments */
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XASSERT_NONVOID(InstancePtr != NULL);
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XASSERT_NONVOID((FifoType == XPF_READ_FIFO_TYPE) ||
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(FifoType == XPF_WRITE_FIFO_TYPE));
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XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
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/* reset the fifo and then check to make sure the occupancy/vacancy
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* register contents are correct for a reset condition
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*/
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XPF_V100B_RESET(InstancePtr);
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Register = XIo_In32(InstancePtr->RegBaseAddress +
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XPF_COUNT_STATUS_REG_OFFSET);
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/* check the value of the register to ensure that it's correct for the
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* specified FIFO type since both FIFO types reset to empty, but a bit
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* in the register changes definition based upon FIFO type
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*/
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if (FifoType == XPF_READ_FIFO_TYPE) {
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/* check the regiser value for a read FIFO which should be empty */
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if (Register != XPF_EMPTY_FULL_MASK) {
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return XST_PFIFO_BAD_REG_VALUE;
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}
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} else {
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/* check the register value for a write FIFO which should not be full
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* on reset
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*/
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if ((Register & XPF_EMPTY_FULL_MASK) != 0) {
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return XST_PFIFO_BAD_REG_VALUE;
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}
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}
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/* the test was successful */
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/*
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*
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* Read data from a FIFO and puts it into a specified buffer. The packet FIFO is
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* currently 32 bits wide such that an input buffer which is a series of bytes
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* is filled from the FIFO a word at a time. If the requested byte count is not
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* a multiple of 32 bit words, it is necessary for this function to format the
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* remaining 32 bit word from the FIFO into a series of bytes in the buffer.
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* There may be up to 3 extra bytes which must be extracted from the last word
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* of the FIFO and put into the buffer.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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* @param BufferPtr points to the memory buffer to write the data into. This
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* buffer must be 32 bit aligned or an alignment exception could be
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* generated. Since this buffer is a byte buffer, the data is assumed to
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* be endian independent.
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* @param ByteCount contains the number of bytes to read from the FIFO. This
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* number of bytes must be present in the FIFO or an error will be
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* returned.
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*
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* @return
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*
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* XST_SUCCESS indicates the operation was successful. If the number of
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* bytes specified by the byte count is not present in the FIFO
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* XST_PFIFO_LACK_OF_DATA is returned.
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*
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* If the function was successful, the specified buffer is modified to contain
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* the bytes which were removed from the FIFO.
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*
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* @note
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*
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* Note that the exact number of bytes which are present in the FIFO is
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* not known by this function. It can only check for a number of 32 bit
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* words such that if the byte count specified is incorrect, but is still
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* possible based on the number of words in the FIFO, up to 3 garbage bytes
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* may be present at the end of the buffer.
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* <br><br>
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* This function assumes that if the device consuming data from the FIFO is
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* a byte device, the order of the bytes to be consumed is from the most
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* significant byte to the least significant byte of a 32 bit word removed
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* from the FIFO.
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*
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******************************************************************************/
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XStatus
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XPacketFifoV100b_Read(XPacketFifoV100b * InstancePtr,
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u8 * BufferPtr, u32 ByteCount)
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{
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u32 FifoCount;
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u32 WordCount;
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u32 ExtraByteCount;
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u32 *WordBuffer = (u32 *) BufferPtr;
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/* assert to verify valid input arguments including 32 bit alignment of
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* the buffer pointer
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*/
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XASSERT_NONVOID(InstancePtr != NULL);
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XASSERT_NONVOID(BufferPtr != NULL);
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XASSERT_NONVOID(((u32) BufferPtr &
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(XPF_FIFO_WIDTH_BYTE_COUNT - 1)) == 0);
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XASSERT_NONVOID(ByteCount != 0);
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XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
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/* get the count of how many 32 bit words are in the FIFO, if there aren't
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* enought words to satisfy the request, return an error
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*/
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FifoCount = XIo_In32(InstancePtr->RegBaseAddress +
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XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK;
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if ((FifoCount * XPF_FIFO_WIDTH_BYTE_COUNT) < ByteCount) {
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return XST_PFIFO_LACK_OF_DATA;
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}
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/* calculate the number of words to read from the FIFO before the word
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* containing the extra bytes, and calculate the number of extra bytes
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* the extra bytes are defined as those at the end of the buffer when
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* the buffer does not end on a 32 bit boundary
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*/
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WordCount = ByteCount / XPF_FIFO_WIDTH_BYTE_COUNT;
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ExtraByteCount = ByteCount % XPF_FIFO_WIDTH_BYTE_COUNT;
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/* Read the 32 bit words from the FIFO for all the buffer except the
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* last word which contains the extra bytes, the following code assumes
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* that the buffer is 32 bit aligned, otherwise an alignment exception could
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* be generated
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*/
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for (FifoCount = 0; FifoCount < WordCount; FifoCount++) {
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WordBuffer[FifoCount] = XIo_In32(InstancePtr->DataBaseAddress);
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}
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/* if there are extra bytes to handle, read the last word from the FIFO
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* and insert the extra bytes into the buffer
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*/
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if (ExtraByteCount > 0) {
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u32 LastWord;
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u8 *ExtraBytesBuffer = (u8 *) (WordBuffer + WordCount);
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/* get the last word from the FIFO for the extra bytes */
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LastWord = XIo_In32(InstancePtr->DataBaseAddress);
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/* one extra byte in the last word, put the byte into the next location
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* of the buffer, bytes in a word of the FIFO are ordered from most
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* significant byte to least
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*/
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if (ExtraByteCount == 1) {
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ExtraBytesBuffer[0] = (u8) (LastWord >> 24);
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}
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/* two extra bytes in the last word, put each byte into the next two
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* locations of the buffer
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*/
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else if (ExtraByteCount == 2) {
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ExtraBytesBuffer[0] = (u8) (LastWord >> 24);
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ExtraBytesBuffer[1] = (u8) (LastWord >> 16);
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}
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/* three extra bytes in the last word, put each byte into the next three
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* locations of the buffer
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*/
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else if (ExtraByteCount == 3) {
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ExtraBytesBuffer[0] = (u8) (LastWord >> 24);
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ExtraBytesBuffer[1] = (u8) (LastWord >> 16);
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ExtraBytesBuffer[2] = (u8) (LastWord >> 8);
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}
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}
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/*
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*
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* Write data into a packet FIFO. The packet FIFO is currently 32 bits wide
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* such that an input buffer which is a series of bytes must be written into the
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* FIFO a word at a time. If the buffer is not a multiple of 32 bit words, it is
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* necessary for this function to format the remaining bytes into a single 32
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* bit word to be inserted into the FIFO. This is necessary to avoid any
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* accesses past the end of the buffer.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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* @param BufferPtr points to the memory buffer that data is to be read from
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* and written into the FIFO. Since this buffer is a byte buffer, the data
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* is assumed to be endian independent. This buffer must be 32 bit aligned
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* or an alignment exception could be generated.
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* @param ByteCount contains the number of bytes to read from the buffer and to
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* write to the FIFO.
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*
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* @return
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*
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* XST_SUCCESS is returned if the operation succeeded. If there is not enough
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* room in the FIFO to hold the specified bytes, XST_PFIFO_NO_ROOM is
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* returned.
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*
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* @note
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*
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* This function assumes that if the device inserting data into the FIFO is
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* a byte device, the order of the bytes in each 32 bit word is from the most
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* significant byte to the least significant byte.
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*
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******************************************************************************/
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XStatus
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XPacketFifoV100b_Write(XPacketFifoV100b * InstancePtr,
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u8 * BufferPtr, u32 ByteCount)
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{
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u32 FifoCount;
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u32 WordCount;
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u32 ExtraByteCount;
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u32 *WordBuffer = (u32 *) BufferPtr;
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/* assert to verify valid input arguments including 32 bit alignment of
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* the buffer pointer
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*/
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XASSERT_NONVOID(InstancePtr != NULL);
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XASSERT_NONVOID(BufferPtr != NULL);
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XASSERT_NONVOID(((u32) BufferPtr &
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(XPF_FIFO_WIDTH_BYTE_COUNT - 1)) == 0);
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XASSERT_NONVOID(ByteCount != 0);
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XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);
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/* get the count of how many words may be inserted into the FIFO */
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FifoCount = XIo_In32(InstancePtr->RegBaseAddress +
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XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK;
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/* Calculate the number of 32 bit words required to insert the specified
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* number of bytes in the FIFO and determine the number of extra bytes
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* if the buffer length is not a multiple of 32 bit words
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*/
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WordCount = ByteCount / XPF_FIFO_WIDTH_BYTE_COUNT;
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ExtraByteCount = ByteCount % XPF_FIFO_WIDTH_BYTE_COUNT;
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/* take into account the extra bytes in the total word count */
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if (ExtraByteCount > 0) {
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WordCount++;
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}
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/* if there's not enough room in the FIFO to hold the specified
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* number of bytes, then indicate an error,
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*/
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if (FifoCount < WordCount) {
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return XST_PFIFO_NO_ROOM;
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}
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/* readjust the word count to not take into account the extra bytes */
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if (ExtraByteCount > 0) {
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WordCount--;
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}
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/* Write all the bytes of the buffer which can be written as 32 bit
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* words into the FIFO, waiting to handle the extra bytes seperately
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*/
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for (FifoCount = 0; FifoCount < WordCount; FifoCount++) {
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XIo_Out32(InstancePtr->DataBaseAddress, WordBuffer[FifoCount]);
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}
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/* if there are extra bytes to handle, extract them from the buffer
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* and create a 32 bit word and write it to the FIFO
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*/
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if (ExtraByteCount > 0) {
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u32 LastWord = 0;
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u8 *ExtraBytesBuffer = (u8 *) (WordBuffer + WordCount);
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/* one extra byte in the buffer, put the byte into the last word
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* to be inserted into the FIFO, perform this processing inline rather
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* than in a loop to help performance
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*/
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if (ExtraByteCount == 1) {
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LastWord = ExtraBytesBuffer[0] << 24;
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}
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/* two extra bytes in the buffer, put each byte into the last word
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* to be inserted into the FIFO
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*/
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else if (ExtraByteCount == 2) {
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LastWord = ExtraBytesBuffer[0] << 24 |
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ExtraBytesBuffer[1] << 16;
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}
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/* three extra bytes in the buffer, put each byte into the last word
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* to be inserted into the FIFO
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*/
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else if (ExtraByteCount == 3) {
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LastWord = ExtraBytesBuffer[0] << 24 |
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ExtraBytesBuffer[1] << 16 |
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ExtraBytesBuffer[2] << 8;
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}
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/* write the last 32 bit word to the FIFO and return with no errors */
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XIo_Out32(InstancePtr->DataBaseAddress, LastWord);
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}
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return XST_SUCCESS;
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}
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